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參數(shù)資料
| 型號： | MAX1304ECM/V+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 17/37頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 4000KSPS 8CH 48LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 3.65M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1.82W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個單端，單極 |
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MAX1304–MAX1306/MAX1308–MAX1310/MAX1312–MAX1314
8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
24
______________________________________________________________________________________
Power-Up Reset
At power-up, all channels are selected for conversion
(see the
Configuration Register section). After applying
power, allow the 1ms wake-up time to elapse and then
initiate a dummy conversion and discard the results.
After the dummy conversion is complete, accurate con-
versions can be obtained.
Power-Saving Modes
Shutdown Mode
During shutdown the internal reference and analog
circuits in the device shutdown and the analog supply
current drops to 0.6A (typ). Select shutdown mode
using the SHDN input. Set SHDN high to enter shut-
down mode. SHDN takes precedence over CHSHDN.
Entering and exiting shutdown mode does not change
the configuration byte. However, a new configuration
byte can be written while in shutdown mode by follow-
ing the standard write procedure shown in Figure 6.
EOC and EOLC are high when the MAX1304–MAX1306/
MAX1308–MAX1310/MAX1312–MAX1314 are shut down.
The state of the digital outputs D0–D11 is independent
of the state of SHDN. If CS and RD are low, the digital
outputs D0–D11 are active regardless of SHDN. The
digital outputs only go high impedance when CS or RD
is high. When the digital outputs are powered down, the
digital supply current drops to 20nA.
Exiting shutdown (falling edge of SHDN) starts a con-
version in the same way as the rising edge of CONVST.
After coming out of shutdown, initiate a dummy conver-
sion and discard the results. After the dummy conver-
sion, allow the 1ms wake-up time to expire before
initiating the first accurate conversion.
Channel Shutdown (C
CH
HS
SH
HD
DN
N)
The channel-shutdown feature allows analog input
channels to be powered down when they are not
selected for conversion. Powering down channels that
are not selected for conversion reduces the analog
supply current by 2.9mA per channel. To power down
channels that are not selected for conversion, pull
CHSHDN low. See the Configuration Register section
for information on selecting and deselecting channels
for conversion.
The drawback of powering down analog inputs that are
not selected for conversion is that it takes time to power
them up. Figure 10 shows how a dummy conversion is
used to power up an analog input in external clock
mode. After selecting a new channel in the configura-
tion register, initiate a dummy conversion and discard
the results. After the dummy conversion, allow the 1ms
wake-up time (tWAKE) to expire before initiating the first
accurate conversion.
D0–D11
CONVST
tCTR
tACC
tREQ
tRDL
tRDH
tRTC
tCVEOLCD
tEOC
tQUIET = 50ns
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
ONLY LAST PULSE SHOWN
EOC
RD
CS*
EOLC
* CS CAN BE LOW AT ALL TIMES, LOW DURING THE RD CYCLES, OR THE SAME AS RD.
Figure 9. Read After Conversion—Eight Channels Selected, External Clock
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