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參數(shù)資料
| 型號(hào)： | M8813F3Y-90K1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 78/85頁(yè) |
| 文件大小： | 601K |
| 代理商： | M8813F3Y-90K1 |
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M88 FAMILY
8/85
DEVELOPMENT SYSTEM
The M88x3Fxx FLASH+PSD family is supported
by the Windows-based PSDsoft Development
System. The PSDsoft design flow is shown in
Figure 4. The PLD design entry is done using
PSDabel,
which
creates
a
minimized logic
implementation, and provides logic simulation of
the PLDs. The M88x3Fxx FLASH+PSD MCU Bus
Interface and I/O Port configuration are entered in
PSD Configuration.
PSDsoft can generate ANSI C functions specific to
the PSD. The user can merge these C functions
with their own, and then compile and link it using
any embedded C compiler on the market.
PSD Fitter is comprised of a fitter and address
translator. It generates a programming data file
(.obj) based on PSD configuration data, the
PSDabel file, and the microcontroller firmware.
The
object
file
can
be
downloaded
to
a
Table 7. Pin Description
Pin Name
Pin1
Type
Description
ADIO0-7
30-37
I/O
This is the lower Address/Data port. Connect your MCU address or address/data bus
according to the following rules:
1. If your MCU has a multiplexed address/data bus where the data is multiplexed with the
lower address bits, connect AD[0:7] to this port.
2. If your MCU does not have a multiplexed address/data bus, or you are using an
80C251 in page mode, connect A[0:7] to this port.
3. If you are using an 80C51XA in burst mode, connect A4/D0 through A11/D7 to this
port.
ALE or AS latches the address. The PSD drives data out only if the read signal is active
and one of the PSD functional blocks was selected. The addresses on this port are
passed to the PLDs.
ADIO8-15
39-46
I/O
This is the upper Address/Data port. Connect your MCU address or address/data bus
according to the following rules:
1. If your MCU has a multiplexed address/data bus where the data is multiplexed with the
lower address bits, connect A[8:15] to this port.
2. If your MCU does not have a multiplexed address/data bus, connect A[8:15] to this
port.
3. If you are using an 80C251 in page mode, connect AD[8:15] to this port.
4. If you are using an 80C51XA in burst mode, connect A12/D8 through A19/D15 to this
port.
ALE or AS latches the address. The PSD drives data out only if the read signal is active
and one of the PSD functional blocks was selected. The addresses on this port are
passed to the PLDs.
CNTL0
47
I
The following control signals can be connected to this port, based on your MCU:
1. WR — active-low write input.
2. R_W — active-high read/active low write input.
This port is connected to the PLDs. Therefore, these signals can be used in decode and
other logic equations.
CNTL1
50
I
The following control signals can be connected to this port, based on your MCU:
1. RD — active-low read input.
2. E — E clock input.
3. DS — active-low data strobe input.
4. PSEN — connect PSEN to this port when it is being used as an active-low read signal.
For example, when the 80C251 outputs more than 16 address bits, PSENis actually the
read signal.
This port is connected to the PLDs. Therefore, these signals can be used in decode and
other logic equations.
CNTL2
49
I
This port can be used to input the PSEN (Program Select Enable) signal from any MCU
that uses this signal for code exclusively. If your MCU does not output a Program Select
Enable signal, this port can be used as a generic input. This port is connected to the
PLDs.
Reset
48
I
Active low reset input. Resets I/O Ports, PLD Macrocells and some of the configuration
registers. Must be active at power up.
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| M8813F3Y-90T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F3Y-90K1T | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
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