參數資料
型號: M65761FP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁數: 4/36頁
文件大?。?/td> 297K
代理商: M65761FP
M65761FP
REJ03F0234-0200 Rev.2.00 Sep 14, 2007
Page 10 of 33
Description of Registers
(1) System set up register (W/R)
(Address: 0)
d7 (MSB)
d0
SYS_REG:
PB
PI
BX
BS
CX
MOD
HR
d0 (HR):
H/W reset (0: Active, 1: Reset state)
To make a H/W reset, set this bit to 1 then to 0.
Reset initializes the entire LSI including the group of register and line memory. However, the
context table RAM is not initialized.
d1, d2 (MOD):
This sets up the operating modes.
(d2 = 0, d1 = 0: coding, d2 = 1, d1 = 0: lage data through (lage data I/F Host I/F),
d2 = 0, d1 = 1: decoding, d2 = 1, d1 = 1: lage data through (Host I/F lage data I/F))
d3 (CX):
Context select (0: internal context, 1: Image data through)
Note:
The internal context should be selected when the image data through mode is used.
When initializing or processing R/W of the context table RAM and coding/decoding.
This bit must be set the same. (Because RAM configuration changes depending on
internal/external modes.)
d4 (BS):
Select data bit swap of the host bus. (0: MSB (d7) first, 1: LSB (d0) first)
d5 (BX):
Select data byte swap of the host bus. (0: Lower byte (A) first, 1: Upper byte (B) first)
Note:
BX is valid only when the host bus is 16 bits. (BUS16 = HIGH)
Table 1 The Coed Data and Image Data Lineup on the Host Bus
Swap
Upper Address (B)
Lower Address (A)
Bus Width
BUS16
BX
BS
d15
d8
d7
d0
0
b8
b15
b0
b7
0
1
b15
b8
b7
b0
1
0
b0
b7
b8
b15
1
16-bit
1
b7
b0
b15
b8
0
b0
b7
0
8-bit
1
b7
b0
Note:
b0 is the first coded data on the time series/the left-hand side image data on the screen.
b15 is the last coded data on the time series/the right-hand image data on the screen.
b6 (PI):
Selects the image data I/O I/F (0: Serial I/F, 1: Parallel I/F)
b7 (PB):
Selects the bit width of the image data bus (0: 32-bit bus (PD0 to 31), 1: 16-bit bus (PD0 to 15))
Table 2 The Image Data Lineup on the Image Data Parallel Bus
Bit Width
PD31
PD16
PD15
PD0
PB = 0
p0
p15
p16
p31
PB = 1
p0
p15
Note:
p0 is the image data on the left-hand on the screen.
p31 is the image data on the right-hand on the screen.
相關PDF資料
PDF描述
M65762FP SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144
M65762FP SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144
M66011FP 1 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO24
M66239FP OTHER CLOCK GENERATOR, PQFP144
M66239FP OTHER CLOCK GENERATOR, PQFP144
相關代理商/技術參數
參數描述
M65762FP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:QM-Coder
M65790FP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FBTC IMAGE DATA COMPRESSION and DECOMPRESSION LSI
M65817AFP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:Digital Amplifier Processor of S-Master Technology
M65818AFP 制造商:Renesas Electronics Corporation 功能描述:M65818AFP
M65821 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:CD PLAYER DIGITAL SIGNAL PROCESSOR