Timers (Timer A)
110
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Figure 1.14.5. TA0 to TA4 Registers, TABSR Register, and UDF Register
Symbol
TA0
TA1
TA2
TA3
TA4
Function
Address
0387
16
, 0386
16
0389
16
, 0388
16
038B
16
, 038A
16
038D
16
, 038C
16
038F
16
, 038E
16
After reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Setting range
b7
b0 b7
b0
(b15)
(b8)
Timer Ai register (i= 0 to 4) (Note 1)
RW
Divide the count source by n + 1 where n =
set value
Divide the count source by FFFF
16
– n + 1
where n = set value when counting up or
by n + 1 when counting down
Divide the count source by n where n = set
value and cause the timer to stop
Modify the pulse width as follows:
PWM period: (2
16
– 1) / fj
High level PWM pulse width: n / fj
where n = set value, fj = count source
frequency
0000
16
to FFFE
16
(Note 3, 4)
Note 1: The register must be accessed in 16 bit units.
Note 2: If the TAi register is set to ‘0000
16
,’ the counter does not work and timer Ai interrupt
requests are not generated either. Furthermore, if “pulse output” is selected, no pulses are
output from the TAiOUT pin.
Note 3: If the TAi register is set to ‘0000
16
,’ the pulse width modulator does not work, the output
level on the TAiOUT pin remains low, and timer Ai interrupt requests are not generated
either. The same applies when the 8 high-order bits of the timer TAi register are set to ‘001
6’ while operating as an 8-bit pulse width modulator.
Note 4: Use the MOV instruction to write to the TAi register.
Note 5: The timer counts pulses from an external device or overflows or underflows in other timers.
16
to FE
16
(Hig00
16
to FF
16
(Lo00
Timer A4 up/down flag
Timer A3 up/down flag
Timer A2 up/down flag
Timer A1 up/down flag
Timer A0 up/down flag
Timer A2 two-phase pulse
signal processing select bit
Timer A3 two-phase pulse
signal processing select bit
Timer A4 two-phase pulse
signal processing select bit
Symbol
UDF
Address
0384
16
After reset
00
16
TA4P
TA3P
TA2P
Up/down flag (Note 1)
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
TA4UD
TA3UD
TA2UD
TA1UD
TA0UD
0 : Down count
1 : Up count
Enabled by setting the TAiMR
register’s MR2 bit to “0”
(= switching source in UDF
register) during event counter
mode.
0 : two-phase pulse signal WO
processing disabled
1 : two-phase pulse signal
processing enabled
Symbol
TABSR
Address
0380
16
After reset
00
16
Count start flag
Bit name
Function
Bit symbol
RW
RW
b7
b6
b5
b4
b3
b2
b1
b0
AAAAAAAAAAAAAA
AAAAAAAAAAAAAA
Timer B2 count start flag
TB2S
Timer B0 count start flag
Timer A4 count start flag
Timer A3 count start flag
Timer A2 count start flag
Timer A1 count start flag
Timer A0 count start flag
0 : Stops counting
1 : Starts counting
TB0S
TA4S
TA3S
TA2S
TA1S
TA0S
Note 1: Use MOV instruction to write to this register.
Note 2: Make sure the port direction bits for the TA2
IN
to TA4I
N
and TA2
OUT
to TA4
OUT
pins are set
to “0” (input mode).
Note 3: When not using the two-phase pulse signal processing function, set the corresponding bit
to “0”.
RW
RW
WO
WO
WO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
WO
WO
Timer
mode
Event
counter
mode
One-shot
timer mode
Pulse width
modulation
mode
(16-bit PWM)
Pulse width
modulation
mode
(8-bit PWM)
0000
16
to FFFF
16
0000
16
to FFFF
16
0000
16
to FFFF
16
(Notes 2, 4)
Mode
Modify the pulse width as follows:
PWM period: (2
8
– 1) x (m + 1)/ fj
High level PWM pulse width: (m + 1)n / fj
where n = high-order address set value,
m = low-order address set value, fj =
count source frequency
(Note 3, 4)
(Notes 2, 3)
(Note 5)