參數(shù)資料
型號(hào)： M50LPW116N5T
廠商： 意法半導(dǎo)體
英文描述： 16 Mbit 2Mb x8, Boot Block 3V Supply Low Pin Count Flash Memory
中文描述： 16兆位的2Mb × 8，啟動(dòng)塊3V電源低引腳數(shù)快閃記憶體
文件頁(yè)數(shù)： 29/36頁(yè)
文件大?。?/td> 259K
代理商： M50LPW116N5T
29/36
M50LPW116
Figure 14. Quadruple Byte Program Flowchart and Pseudo Code (A/A Mux Interface Only)
Note: 1. A Status check of b3 (V
PP
invalid) and b4 (Program Error) can be made after each Program operation by following the correct com-
mand sequence.
2. If an error is found, the Status Register must be cleared before further Program/Erase Controller operations.
3. Address 1, Address 2, Address 3 and Address 4 must be consecutive addresses differing only for address bits A0 and A1.
AI03982
Write Address 4
& Data 4
(3)
Read Status
Register
YES
NO
b7 = 1
YES
NO
b3 = 0
NO
b4 = 0
VPP Invalid
Error (1, 2)
Program
Error (1, 2)
Quadruple Byte Program command:
– write 30h
– write Address 1 & Data 1
(3)
– write Address 2 & Data 2
(3)
– write Address 3 & Data 3
(3)
– write Address 4 & Data 4
(3)
(memory enters read status state after
the Quadruple Byte Program command)
do:
– read Status Register if Program/Erase
Suspend command given execute
suspend program loop
while b7 = 1
If b3 = 1, VPP invalid error:
– error handler
If b4 = 1, Program error:
– error handler
End
YES
Suspend
Suspend
Loop
NO
YES
Write 30h
Start
Write Address 1
& Data 1
(3)
Write Address 2
& Data 2
(3)
Write Address 3
& Data 3
(3)
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