參數(shù)資料
型號(hào)： M50LPW116N5T
廠商： 意法半導(dǎo)體
英文描述： 16 Mbit 2Mb x8, Boot Block 3V Supply Low Pin Count Flash Memory
中文描述： 16兆位的2Mb × 8，啟動(dòng)塊3V電源低引腳數(shù)快閃記憶體
文件頁(yè)數(shù)： 12/36頁(yè)
文件大小： 259K
代理商： M50LPW116N5T
M50LPW116
12/36
Table 11. Commands
Note:
X Don’t Care, PA Program Address, PD Program Data, A
1,2,3,4
Consecutive Addresses, BA Any address in the Block.
Read Memory Array.
After a Read Memory Array command, read the memory as normal until another command is issued.
Read Status Register.
After a Read Status Register command, read the Status Register as normal until another command is issued.
Read Electronic Signature.
After a Read Electronic Signature command, read Manufacturer Code, Device Code until another com-
mand is issued.
Block Erase, Program.
After these commands read the Status Register until the command completes and another command is is-
sued.
Quadruple Byte Program (A/A Mux Mode).
Addresses A
, A
, A
and A
must be consecutive addresses differing only for address
bit A0 and A1. After this command, the user should repeatedly read the Status Register until the command has completed, at which
point another command can be issued.
Chip Erase.
This command is only valid in A/A Mux mode. After this command read the Status Register until the command completes
and another command is issued.
Clear Status Register.
After the Clear Status Register command bits 1, 3, 4 and 5 in the Status Register are reset to ‘0’.
Program/Erase Suspend.
After the Program/Erase Suspend command has been accepted, issue Read Memory Array, Read Status
Register, Program (during Erase suspend) and Program/Erase resume commands.
Program/Erase Resume.
After the Program/Erase Resume command the suspended Program/Erase operation resumes, read the
Status Register until the Program/Erase Controller completes and the memory returns to Read Mode.
Invalid/Reserved.
Do not use Invalid or Reserved commands.
Command
C
Bus Write Operations
1st
2nd
3rd
4th
5th
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read Memory Array
1
X
FFh
Read Status Register
1
X
70h
Read Electronic Signature
1
X
90h
1
X
98h
Program
2
X
40h
PA
PD
2
X
10h
PA
PD
Quadruple Byte Program
(A/A Mux Mode)
5
X
30h
A
1
PD
A
2
PD
A
3
PD
A
4
PD
Chip Erase
2
X
80h
X
10h
Block Erase
2
X
20h
BA
D0h
Clear Status Register
1
X
50h
Program/Erase Suspend
1
X
B0h
Program/Erase Resume
1
X
D0h
Invalid/Reserved
1
X
00h
1
X
01h
1
X
60h
1
X
2Fh
1
X
C0h
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