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參數(shù)資料
| 型號(hào)： | M41ST85WMH6TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.300 INCH, SNAPHAT, PLASTIC, SOH-28 |
| 文件頁數(shù)： | 4/41頁 |
| 文件大?。?/td> | 376K |
| 代理商： | M41ST85WMH6TR |
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Operating modes
M41ST85W
2
Operating modes
The M41ST85W clock operates as a slave device on the serial bus. Access is obtained by
implementing a start condition followed by the correct slave address (D0h). The 64 bytes
contained in the device can then be accessed sequentially in the following order:
1.
Tenths/hundredths of a second register
2.
Seconds register
3.
Minutes register
4.
Century/hours register
5.
Day register
6.
Date register
7.
Month register
8.
Year register
9.
Control register
10. Watchdog register
11 - 16. Alarm registers
17 - 19. Reserved
20. Square wave register
21 - 64. User RAM
The M41ST85W clock continually monitors VCC for an out-of-tolerance condition. Should
VCC fall below VPFD, the device terminates an access in progress and resets the device
address counter. Inputs to the device will not be recognized at this time to prevent erroneous
data from being written to the device from a an out-of-tolerance system. When VCC falls
below VSO, the device automatically switches over to the battery and powers down into an
ultralow current mode of operation to conserve battery life. As system power returns and
VCC rises above VSO, the battery is disconnected, and the power supply is switched to
external VCC.
Write protection continues until VCC reaches VPFD(min) plus trec (min).
For more information on battery storage life refer to application note AN1012.
2.1
2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined:
●
Data transfer may be initiated only when the bus is not busy.
●
During data transfer, the data line must remain stable whenever the clock line is high.
●
Changes in the data line, while the clock line is high, will be interpreted as control
signals.
相關(guān)PDF資料 |
PDF描述 |
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| M41ST85WMH6E | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST87WMX6 | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST87YMX6 | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST87YMX6TR | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST87WMX6TR | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41ST85WMSX6 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| M41ST85WMX | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR |
| M41ST85WMX6 | 功能描述:實(shí)時(shí)時(shí)鐘 Serial 512 (64x8) RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M41ST85WMX6E | 制造商:STMicroelectronics 功能描述: |
| M41ST85WMX6E2 | 制造商:STME 功能描述: 制造商:STMicroelectronics 功能描述: |
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