參數(shù)資料
型號(hào)： M41ST85WMH6TR
廠商： STMICROELECTRONICS
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝： 0.300 INCH, SNAPHAT, PLASTIC, SOH-28
文件頁數(shù)： 21/41頁
文件大?。?/td> 376K
代理商： M41ST85WMH6TR
Clock operation
M41ST85W
3.13
trec bit
Bit D7 of clock register 04h contains the trec bit (TR). trec refers to the automatic
continuation of the deselect time after VCC reaches VPFD. This allows for a voltage settling
time before WRITEs may again be performed to the device after a power-down condition.
The trec bit will allow the user to set the length of this deselect time as defined by Table 6.
3.14
Initial power-on defaults
Upon initial application of power to the device, the following register bits are set to a '0' state:
watchdog register, FT, AFE, ABE, SQWE, and TR. The following bits are set to a '1' state:
ST, OUT, and HT (see Table 7).
Table 6.
trec definitions
Table 7.
Default values
trec bit (TR)
STOP bit (ST)
trec time
Units
Min
Max
00
96
98
ms
01
40
200(1)
1.
Default setting
ms
1
X
50
2000
s
Condition
TR
ST
HT
Out
FT
AFE
ABE
SQWE
Watchdog
register(1)
1.
WDS, BMB0-BMB4, RB0, RB1.
Initial power-up(2)
2.
State of other control bits undefined.
011
10
00
0
Subsequent power-up
(with battery backup)(3)
3.
UC = Unchanged
UC
1
UC
0
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