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參數資料
| 型號： | M41ST85WMH6TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數據恢復及定時提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.300 INCH, SNAPHAT, PLASTIC, SOH-28 |
| 文件頁數： | 16/41頁 |
| 文件大?。?/td> | 376K |
| 代理商： | M41ST85WMH6TR |
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M41ST85W
Clock operation
3.4
Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every
year, month, day, hour, minute, or second. It can also be programmed to go off while the
M41ST85W is in the battery backup to serve as a system wake-up call.
Bits RPT5–RPT1 put the alarm in the repeat mode of operation. Table 3 shows the possible
configurations. Codes not listed in the table default to the once per second mode to quickly
alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5–RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set, the
alarm condition activates the IRQ/FT/OUT pin as shown in Figure 15. To disable alarm,
write '0' to the alarm date register and to RPT5–RPT1.
Note:
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “Alarm Seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ/FT/OUT output is cleared by a READ to the flags register. A subsequent READ of
the flags register is necessary to see that the value of the alarm flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the battery backup mode. The IRQ/FT/OUT
will go low if an alarm occurs and both ABE (alarm in battery backup mode enable) and AFE
are set. The ABE and AFE bits are reset during power-up, therefore an alarm generated
during power-up will only set AF. The user can read the flag register at system boot-up to
determine if an alarm was generated while the M41ST85W was in the deselect mode during
power-up. Figure 16 on page 24 illustrates the backup mode alarm timing.
Figure 15.
Alarm interrupt reset waveform
Table 3.
Alarm repeat modes
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm setting
11111
Once per second
11110
Once per minute
11100
Once per hour
11000
Once per day
10000
Once per month
00000
Once per year
AI03664
IRQ/FT/OUT
ACTIVE FLAG
0Fh
0Eh
10h
HIGH-Z
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相關代理商/技術參數 |
參數描述 |
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| M41ST85WMSX6 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| M41ST85WMX | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR |
| M41ST85WMX6 | 功能描述:實時時鐘 Serial 512 (64x8) RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M41ST85WMX6E | 制造商:STMicroelectronics 功能描述: |
| M41ST85WMX6E2 | 制造商:STME 功能描述: 制造商:STMicroelectronics 功能描述: |
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