- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383299 > M39832-B12WNE1T (意法半導(dǎo)體) TVS UNI-DIR 30V 600W DO-15 PDF資料下載
參數(shù)資料
| 型號： | M39832-B12WNE1T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | TVS UNI-DIR 30V 600W DO-15 |
| 中文描述： | 單芯片8兆1兆x8或512KB的x16閃存和256千位并行EEPROM存儲器 |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 253K |
| 代理商： | M39832-B12WNE1T |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
READ
DQ2, DQ5 & DQ6
START
READ DQ2, DQ6
FAIL
PASS
AI01873
DQ2=
TOGGLE
NO
NO
YES
YES
DQ5
= 1
NO
YES
DQ2=
TOGGLE
Figure 7B. Flash ata Toggle Flowchart
READ
DQ5 & DQ6
START
READ DQ6
FAIL
PASS
AI01370
D=
TOGGLE
NO
NO
YES
YES
DQ5
= 1
NO
YES
D=
TOGGLE
Figure 7A. Data Toggle Flowchart
Toggle Bit, DQ2 (Flash array only).
This toggle
bit, together with DQ6, can be used to determine
the device status during the Erase operations. It
can also be used to identify the block being erased.
During Erase or Erase Suspend a read from a block
being erased will cause DQ2 to toggle. A read from
a block not being erased will set DQ2 to ’1’ during
erase and to DQ2 during Erase Suspend. During
Flash Array Erase, a read operation will cause
DQ2 to toggle as all blocks are being erased. DQ2
will be set to ’1’ during program operation and when
erase is complete. After erase completion and if the
error bit DQ5 is set to ’1’, DQ2 will toggle if the faulty
block is addressed.
Error flag, DQ5 (Flash block only).
This bit is set
to ’1’ by the internal logic when there is a failure of
programming, block erase, or chip erase that re-
sults in invalid data in the memory block. In case of
an error in block erase or program, the block in
which the error occured or to which the pro-
grammed data belongs, must be discarded. The
DQ5 failure condition will also appear if a user tries
to program a ’1’ to a location that is previously
programmed to ’0’. Other Blocks may still be used.
The error bit resets after a Read/Reset (RD) in-
struction. In case of success of Program or Erase,
the error bit will be set to ’0’ . when A0 is High with
A1 Low.
Erase Timer Bit, DQ3 (Flash array only).
This bit
is set to ’0’ by internal logic when the last block
Erase command has been entered to the Com-
mand Interface and it is awaiting the Erase start.
When the erase timeout period is finished, after
50ms to 90ms, DQ3 returns to ’1’.
WRITE a BYTE (or a PAGE) in EEPROM
It should be noticed that writing in the EEPROM
array is an operation, it is not an instruction (as for
Programming a byte in the Flash array).
Write a Byte in EEPROM Array
A write operation is initiated when Chip Enable EE
is Low and Write Enable W is Low with Output
16/36
M39832
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M39832-B15WNE1T | TVS BI-DIR 30V 600W DO-15 |
| M39832-T12WNE6T | TVS UNI-DIR 33V 600W DO-15 |
| M39832-T15WNE6T | TVS BI-DIR 33V 600W DO-15 |
| M39832-B12WNE6T | RECTIFIER, BRIDGE, 600V, 6A, PB-6 |
| M39832-B15WNE6T | TVS UNI-DIR 51V 600W DO-15 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M39832-B12WNE6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832-B15WNE1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832-B15WNE6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832NE | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832-T12WNE1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。