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參數(shù)資料
| 型號(hào)： | M38C13E6HP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 21/59頁(yè) |
| 文件大?。?/td> | 1063K |
| 代理商： | M38C13E6HP |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C1 Group
21
TIMERS
The 38C1 group has five timers: timer X, timer Y, timer 1, timer 2,
and timer 3. Timer X and timer Y are 16-bit timers, and timer 1,
timer 2, and timer 3 are 8-bit timers.
All timers are down count timers. When the timer reaches
“
0
”
, an
underflow occurs at the next count pulse and the corresponding
timer latch is reloaded into the timer and the count is continued.
When a timer underflows, the interrupt request bit corresponding
to that timer is set to
“
1
”
.
Read and write operation on 16-bit timer must be performed for
both high- and low-order bytes. When reading a 16-bit timer, read
the high-order byte first. When writing to a 16-bit timer, write the
low-order byte first. The 16-bit timer cannot perform the correct
operation when reading during the write operation, or when writing
during the read operation.
Fig. 18 Timer block diagram
"1"
P5
3
/CNTR
1
"0"
"10"
"00","01","11"
P
5
2
/
C
N
T
R
0
Q
Q
T
S
P5
2
direction register
P
u
l
s
e
o
u
t
p
u
t
m
o
d
e
P
5
2
l
a
t
c
h
"0"
"
1
"
"
0
"
"1"
h
m
e
"10"
P
m
u
e
l
s
a
e
s
u
w
r
i
d
t
e
n
t
edge switch bit
m
o
d
e
C
N
T
R
0
e
d
g
e
s
w
i
t
c
h
b
i
t
Q
Q
T
S
"0"
P6
2
direction register
P6
2
latch
"0"
"1"
T
O
e
d
U
g
T
e
o
s
u
w
t
p
i
t
u
c
t
h
b
i
t
"0"
"
1
"
T
OUT
output
control bit
"
1
"
P
6
2
/
T
O
U
T
f
(
X
C
I
N
)
"0"
"1"
c
o
s
e
1
)
T
O
U
T
o
u
t
p
u
t
c
o
n
t
r
o
l
b
i
t
φ
S
O
U
R
C
E
/
1
i
s
6
"
1
1
"
φ
S
O
U
R
C
E
/
1
6
"
1
"
"0"
Count source selection bit (Note 1)
φ
S
O
U
R
C
E
φ
SOURCE
/16
φ
SOURCE
/16
f
(
X
I
N
)
/
1
6
(
N
o
t
e
2
)
T
m
e
l
e
c
r
t
i
1
o
n
c
o
b
u
i
t
n
t
N
s
o
o
t
u
e
r
c
1
e
)
e
(
C
e
N
d
T
e
R
1
s
a
i
c
t
c
t
h
i
v
e
b
g
w
i
t
Timer Y stop
control bit
i
m
Falling edge detection
Period
measurement mode
Timer Y
interrupt
request
P
m
u
l
s
a
e
s
u
w
r
i
d
m
t
h
e
H
n
L
t
c
o
o
n
d
t
i
n
u
o
u
s
l
y
e
e
m
e
Rising edge detection
Timer Y
operating
mode bits
(Note 1)
T
i
n
r
e
i
m
t
e
q
e
r
u
r
u
e
X
p
s
r
t
t
P
u
l
s
e
o
u
t
p
u
t
m
o
d
e
Timer X stop
control bit
Timer X write
control bit
Timer X operat-
ing mode bits
“
00
”
,
“
01
”
,
“
11
”
Timer 2 write
control bit
T
s
(
i
m
o
u
N
e
r
t
e
r
e
3
u
e
n
c
t
i
c
l
t
o
n
b
i
t
o
Timer 2
interrupt
request
Timer 3
interrupt
request
Timer 2 count source
selection bit
(Note 1)
Timer 1
interrupt
request
D
a
t
a
b
u
s
Timer Y (low) (8)
Timer Y (high) (8)
T
i
m
e
r
3
l
a
t
c
h
(
8
)
Timer 3 (8)
Timer 1 latch (8)
i
m
e
r
T
1
(
8
)
Timer 2 latch (8)
Timer 2 (8)
T
i
m
e
r
X
(
l
o
w
)
(
8
)
Timer X (high) (8)
T
i
m
e
r
X
(
l
o
w
)
l
a
t
c
h
(
8
) Timer X (high) latch (8)
T
e
r
Y
(
l
o
w
)
l
a
t
c
h
(
8
)
T
i
m
e
r
Y
(
h
i
g
h
)
l
a
t
c
h
(
8
)
Timer Y operating mode bits
“
00
”
,
“
01
”
,
“
10
”
CNTR
0
interrupt
request
C
i
n
r
e
N
T
r
u
R
1
r
u
e
s
t
q
e
p
t
t
φ
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O
U
R
C
E
:
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E
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