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參數(shù)資料
| 型號： | M38B79MFH-A055FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 83/109頁 |
| 文件大?。?/td> | 1559K |
| 代理商： | M38B79MFH-A055FP |
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83
38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
G
Erase command
The erase command is executed by inputting command code 20
16
in the first cycle and command code 20
16
again in the second
cycle. The command code is latched into the internal command
latch at the rising edges of the WE input in the first cycle and in
the second cycle, respectively. The erase operation is initiated at
the rising edge of the WE input in the second cycle, and the
memory contents are collectively erased within 9.5 ms as mea-
sured by the internal timer. Note that data 00
16
must be written to
all memory locations before executing the erase command.
Note:
An erase operation is not completed by executing the erase
command once. Always be sure to execute an erase verify
command after executing the erase command. When the fail-
ure is found in this verification, the user must repeatedly ex-
ecute the erase command until the pass. Refer to Figure 90
for the erase flowchart.
Fig. 89 Input/output timings during erasing (verify data is output at the same timing as for read.)
G
Erase verify command
The user must verify the contents of all addresses after complet-
ing the erase command. The microcomputer enters the erase
verify mode by inputting the verify address and command code
A0
16
in the first cycle. The address is internally latched at the fall-
ing edge of the WE input, and the command code is internally
latched at the rising edge of the WE input. When control signals
are input in the second cycle at the timing shown in Figure 89, the
M38B79FF outputs the contents of the specified address to the
external.
Note:
If any memory location where the contents have not been
erased is found in the erase verify operation, execute the op-
eration of
“
erase
→
erase verify
”
over again. In this case,
however, the user does not need to write data 00
16
to memory
locations before erasing.
Address
Erase
Erase verify
Verify
address
t
WC
t
CS
t
RRW
t
WP
t
WPH
t
WP
t
DE
t
DS
20
16
20
16
A0
16
Dout
t
DS
t
DH
t
DH
Verify data output
t
DH
t
VSC
t
DS
t
WP
t
WRR
t
CS
t
CS
t
CH
t
CH
t
CH
t
AS
t
AH
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
PP
H
V
PP
L
CE
OE
WE
Data
V
PP
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