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參數(shù)資料
| 型號： | M37906M8C-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42 |
| 封裝： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件頁數(shù)： | 26/99頁 |
| 文件大?。?/td> | 1313K |
| 代理商： | M37906M8C-XXXFP |
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55
8168C-MCU Wireless-02/10
AT86RF212
If a transmission is initiated in TX_ARET mode, the AT86RF212 executes the
CSMA-CA algorithm as defined by IEEE 802.15.4-2006, section 7.5.1.4. If the CCA
reports IDLE, the frame is transmitted from the Frame Buffer.
If an acknowledgement frame is requested, the radio transceiver checks for an ACK
reply automatically. The CSMA-CA based transmission process is repeated as long as
no valid acknowledgement is received or the number of frame retransmissions
(MAX_FRAME_RETRIES) is exceeded.
The completion of the TX_ARET transaction is indicated by the IRQ_3 (TRX_END)
interrupt, see section 5.2.5.
Description
The implemented TX_ARET algorithm is shown in Figure 5-12.
Prior to invoking TX_ARET mode, the basic configuration steps as described in section
5.2.2 shall be executed. It is further recommended to write the PSDU transmit data to
the Frame Buffer in advance.
The transmit start event may either come from a rising edge on pin 11 (SLP_TR) or by
writing a TX_START command to register subfield TRX_CMD (register 0x02,
TRX_STATE).
If the CSMA-CA algorithm detects a busy channel, this process is repeated up to
MAX_CSMA_RETRIES (register 0x2C, XAH_CTRL_0). In case that CSMA-CA does
not detect a clear channel after MAX_CSMA_RETRIES, it aborts the TX_ARET
transaction,
issues
interrupt
IRQ_3
(TRX_END),
and
returns
CHANNEL_ACCESS_FAILURE in register bits TRAC_STATUS (register 0x02,
TRX_STATE).
During transmission of a frame, the radio transceiver parses bit 5 (ACK Request) of the
MAC header (MHR) frame to check whether an ACK reply is expected.
If no ACK is expected, the radio transceiver issues IRQ_3 (TRX_END) directly after the
frame transmission has been completed. The register bits TRAC_STATUS (register
0x02, TRX_STATE) are set to SUCCESS.
If an ACK is expected, after transmission the radio transceiver automatically switches to
receive mode waiting for a valid ACK reply (i.e. matching sequence number and correct
FCS). After receiving a valid ACK frame, the “Frame Pending” subfield of this frame is
parsed and the status register bits TRAC_STATUS are updated to SUCCESS or
SUCCESS_DATA_PENDING accordingly, refer to Table 5-15. At the same time, the
entire TX_ARET transaction is terminated and interrupt IRQ_3 (TRX_END) is issued.
If no valid ACK is received within the timeout period (refer to section 5.2.4.1), the radio
transceiver retries the entire transaction (CSMA-CA based frame transmission) until the
maximum number of frame retransmissions is exceeded, see register bits
MAX_FRAME_RETRIES
(register
0x2C,
XAH_CTRL_0).
In
that
case,
the
TRAC_STATUS is set to NO_ACK, the TX_ARET transaction is terminated, and
interrupt IRQ_3 (TRX_END) is issued.
Table 5-15 summarizes the Extended Operating Mode result codes in register subfield
TRAC_STATUS (register 0x02, TRX_STATE) with respect to the TX_ARET
transaction.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37906M8C-XXXSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:16-BIT CMOS MICROCOMPUTER |
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| M37920FGCGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION |
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