參數(shù)資料
型號: M37905M8C-XXXSP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64
文件頁數(shù): 42/103頁
文件大?。?/td> 1402K
代理商: M37905M8C-XXXSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
42
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Three-phase mode 1
In selecting three-phase waveform mode, three-phase mode 1 is
selected by setting bit 4 of the waveform output mode register (ad-
dress A616) to “1”.
In this mode, each of timers A0 to A2 can have two timer registers
and the contents of those registers are alternately reloaded into the
counter each time the counter of timer A3 becomes 000016.
The interrupt request normally occurs when the counter of timer A3
becomes 000016. However, this occurrence interval can be switched
between “every second time” and “every fourth time.” Bit 4 of the
pulse output data register 1 (address A916) selects that.
Additionally, an even-numbered or odd-numbered timer A3’s under-
flow can be used as the occurrence factor of timer A3 interrupt re-
quest. Bit 5 of the three-phase output data register 1 (address A916)
selects that.
When the timer A3’s counter contents become 000016, the contents
of three-phase output polarity set buffer are set into the output polar-
ity set toggle flip-flop on which the output polarity of three-phase
waveform depends. The contents of three-phase output polarity set
buffer are reversed after that operation.
The polarity of the contents of output polarity set toggle flip-flop is re-
versed each time completion of one-shot pulse of timer (timers A2 to
A0) corresponding to each phase.
Figure 46 shows an example of U-phase waveform and the output
operation is explained.
Write “0” to the three-phase-output-polarity set buffer (bit 3 at ad-
dress A616). Clear the interrupt request interval set bit (bit 4 at ad-
dress A916) to “0” so that the timer A3 interrupt request occurs at
every second time. Additionally, clear the interrupt validity output se-
lect bit (bit 5 at address A916) so that the timer A3 interrupt request
occurs at an each even-numbered underflow of timer A3.
After the procedure above, three-phase mode 1 starts operation
when actuating timer A3.
When the counter of timer A3 becomes 000016, the timer A3 interrupt
request occurs and timer A2 simultaneously starts one-shot pulse
output. At this time, the contents of three-phase output polarity set
buffer, “0” in this case, are set into the output polarity set toggle flip-
flop 2. The contents of three-phase output polarity set buffer are re-
versed from “0” to “1” after that operation.
When the timer A2 counter counts the value written into the timer A2
and the one-shot pulse output of timer A2 is completed, the contents
of output polarity set toggle flip-flop 2 are reversed from “0” to “1”. Si-
multaneously, the one-shot pulse of the 8-bit dead-time timer is out-
put for ensuring time, so that “L” levels of U- and U-phase waveforms
do not overlap.
The U-phase waveform output keeps “H” level from the start until the
one-shot pulse output of the dead-time timer is completed, even if
the contents of output polarity set toggle flip-flop 2 are reversed from
“0” to “1” owing to the timer A2’s one-shot pulse output.
When the one-shot pulse output of the dead-time timer is completed,
“1” of output polarity set toggle flip-flop 2 which has been reversed
becomes valid and the U-phase waveform changes to “L” level.
Then, when the counter of timer A3 becomes 000016, the timer A2
counter counts the value written into timer A2 and timer A2 starts
one-shot pulse output. Simultaneously, the contents of three-phase
output polarity set buffer are set into the output polarity set toggle
flip-flop 2. However, the U-phase waveform remains “L” level, be-
cause the value is the same (“1”).
The contents of three-phase output polarity set buffer are reversed
from “1” to “0” after that operation.
When the one-shot pulse output of timer A2 is completed, the con-
tents of output polarity set toggle flip-flop 2 is reversed from “1” to “0”.
Simultaneously, the one-shot pulse output of the dead-time timer
starts.
When the contents of output polarity set toggle flip-flop 2 is reversed
from “1” to “0”, the U-phase waveform changes its output level from
“L” to “H” without waiting for completion of the one-shot pulse output
of the dead-time timer.
U-phase waveform is generated by repeating the operation above.
The way to generate U-phase waveform, which is the negative
phase of U-phase, is the same as that for U-phase waveform except
that the contents of output polarity set toggle flip-flop 2 is treated as
the reversed signal from the case of U-phase waveform.
In this way, U-phase waveform and U-phase waveform, having the
negative phase of U-phase, are output from the pins so that their “L”
levels do not overlap each other. The width of “L” level can be also
modified by changing the value of timers A2, A21, or A3.
V-, W-phase waveform and V-, W-phase waveform, having their
negative phase, are similarly output according to the corresponding
timer operation.
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