DESCRIPTION
7902 Group User’s Manual
1-7
1.3 Pin description
[Single-chip mode]
P4 is an 8-bit I/O port with the same function as port P0.
By software, P41 can function as the clock
φ1 output pin. While
pin RESET = “L” level and after reset, P44–P47 are pulled up.
This pullup state can be removed by software.
[Memory expansion mode]
P4 is an 8-bit I/O port with the same function as port P0.
By software, P40 can function as pin ALE, P41 as the clock
φ1
output pin, P42 as pin HLDA, P43 as pin HOLD, P44–P47 as pins
CS0–CS3. While pin RESET = “L” level and after reset, P44–P47
are pulled up. This pullup state can be removed by software.
[Microprocessor mode]
P40 functions as pin ALE, P41 as the clock
φ1 output pin, P42
as pin HLDA, P43 as pin HOLD, P44 as pin CS0.
qSignal ALE
This signal is used to latch an address.
qSignal
φ1
This signal has the same period as system clock fsys.
qSignal HOLD
The microcomputer is in Hold state while pin HOLD’s
input level = “L.”
qSignal HLDA
This signal informs the external whether this microcomputer
enters Hold state or not.
qSignal CS0
This signal is a chip select signal.
P45–P47 function as I/O port pins with the same function as
port P0. By software, pin ALE, the clock
φ1 output pin, pins
HLDA, HOLD can function as I/O port pins (P40, P41, P42, P43)
and P45–P47 as pins CS1 to CS3.
Also, P45–P47 are pulled up while pin RESET = “L” level and after
reset. This pullup state can be removed by software.
P5 is an 8-bit I/O port with the same function as port P0.
By software, these pins can function as I/O pins for timers A0 to
A3, pulse output pins for real-time output, or input pins for the
key input interrupt.
P6 is an 8-bit I/O port with the same function as port P0.
By software, these pins can function as I/O pins for timer A4, input
pins for the external interrupts, or input pins for timers B0 to B2.
P7 is an 8-bit I/O port with the same function as port P0.
By software, these pins can function as input pins for the
A-D converter, output pins for the D-A converter, or input
pins for the external interrupts.
I/O port P4
I/O port P5
I/O port P6
I/O port P7
I/O
Output,
Input,
Output,
I/O
P40–P47
ALE,
φ1,
HLDA,
HOLD,
CS0,
P45–P47
P50–P57
P60–P67
P70–P77
Table 1.3.3 Pin description (3)
Pin
Name
Input/Output
Function