7902 Group User’s Manual
21-37
APPENDIX
Appendix 2. Control registers
0
1
2
3
4
5
6
7
0
1
2
3
4
6, 5
7
0
RW
Port function control register (Address 9216)
b7 b6 b5 b4 b3 b2 b1 b0
Bit name
Bit
Function
At reset
R/W
Address/Port switch bits
Port P0 input level select bit
Pins P44–P47 pullup select bit
Fix these bit s to “0.”
Pin NMI pullup select bit
0 0 0 : A0 to A23 (16 Mbytes)
0 0 1 : A0 to A21, P06, P07 (4 Mbytes)
0 1 0 : A0 to A19, P04 to P07 (1 Mbytes)
0 1 1 : A0 to A17, P02 to P07 (256 Kbytes)
1 0 0 : A0 to A15, P00 to P07 (64 Kbytes)
1 0 1 : Do not select.
1 1 0 : A0 to A11, P00 to P07, P114 to P117 (4 Kbytes)
1 1 1 : A0 to A7, P00 to P07, P110 to P117 (256 bytes)
b2 b1 b0
Notes 1: For the M37902FxMHP (power source voltage = 3.3 V±0.3 V), VIH = 0.5 VCC.
2: When MD1 = VCC and MD0 = VCC (flash memory parallel I/O mode), pins P44 to P47 and NMI are not pulled up, regardless of
these bits’ contents.
3: When MD1 = VSS and MD0 = VCC (microprocessor mode), pin CS0 (P44) is not pulled up, regardless of the bits’ contents.
0 : Pins P44–P47 are pulled up.
1 : Pins P44–P47 are not pulled up (Notes 2, 3).
0 : Pin NMI is pulled up.
1 : Pin NMI is not pulled up.
(Note 2)
0 : VIH = 0.7 VCC, VIL = 0.2 VCC
1 : VIH = 0.43 VCC (Note 1), VIL = 0.16 VCC
00
Notes 1: When using pin KIi, do not select timer A’s output pins and pulse output pins which are multiplexed with pin KIi. Refer to
“CHAPTER 9. TIMER A” and “CHAPTER 11. REAL-TIME OUTPUT.”
2: When allocating pin INT2 to P77, do not use pin AN7/ADTRG. Additionally, clear the D-A1 output enable bit (bit 1 at address
9616) to “0” (output disabled).
3: When allocating pin INT3 to P80, clear the D-A2 output enable bit (bit 2 at address 9616) to “0” (output disabled).
When allocating pin INT3 to P74, do not use pin AN4.
4: When allocating pin INT4 to P75, do not use pin AN5.
0
RW
External interrupt input control register (Address 9416)
b7 b6 b5 b4 b3 b2 b1 b0
Bit name
Bit
Function
At reset
R/W
Key input interrupt select bit
Key input interrupt pin pullup
select bit
Key input interrupt pin select bits
Pin INT2 select bit
Pin INT3 select bit
Pin INT4 select bit
Fix this bit to “0”.
0 : Allocate pin INT2 to P64.
1 : Allocate pin INT2 to P77.
(Note 2)
0 0 : Pins KI0 to KI3
0 1 : Pins KI0 to KI2
1 0 : Pins KI0 and KI1
1 1 : Pin KI0
(Note 1)
0
0 : INT3 interrupt
1 : Key input interrupt
0 : Pins KI0 to KI3 are not pulled up.
1 : Pins KI0 to KI3 are pulled up.
b3 b2
0 : Allocate pin INT3 to P80.
(Note 3)
1 : Allocate pin INT3 to P74.
0 : Allocate pin INT4 to P84.
(Note 4)
1 : Allocate pin INT4 to P75.
Reference
3-5
6-7
3-5
6-7
7-19
Reference
8-4
7-19