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參數(shù)資料
| 型號： | M37702M2-127FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁數(shù)： | 33/59頁 |
| 文件大?。?/td> | 811K |
| 代理商： | M37702M2-127FP |
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33
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
If RTS
i
output is selected by setting the bit 2 of UART
i
transmit/re-
ceive control register 0 to “1”, the RTS
i
output is “H” when the RE
i
flag is “0”. When the RE
i
flag changes to “1”, the RTS
i
output goes
“L” to indicate receive ready and returns to “H” once receive has
started. In other words, RTS
i
output can be used to determine ex-
ternally whether the receive register is ready to receive.
The entire transmission data bits are received when the start bit
passes the final bit of the receive block shown in Figure 35. At this
point, the contents of the receive register is transferred to the re-
ceive buffer register and the bit 3 of UART
i
transmit/receive control
register 1 is set. In other words, the RI
i
flag indicates that the re-
ceive buffer register contains data when it is set. If RTS
i
output is
selected, RTS
i
output goes “L” to indicate that the register is ready
to receive the next data.
The interrupt request bit in the UART
i
receive interrupt control reg-
ister is set when the RI
i
flag changes from “0” to “1”.
The bit 4 (OER
i
flag) of UART
i
transmission control register 1 is
set when the next data is transferred from the receive register to
the receive buffer register while the RI
i
flag is “1”. In other words
when an overrun error occurs. If the OER
i
flag is “1”, it indicates
that the next data has been transferred to the receive buffer regis-
ter before the contents of the receive buffer register has been
read.
Bit 5 (FER
i
flag) is set when the number of stop bits is less than
required (framing error).
Bit 6 (PER
i
flag) is set when a parity error occurs.
Bit 7 (SUM
i
flag) is set when either the OER
i
flag, FER
i
flag, or the
PER
i
flag is set. Therefore, the SUM
i
flag can be used to deter-
mine whether there is an error.
The setting of the RIi flag, OER
i
flag, FER
i
flag, and the PER
i
flag
is performed while transferring the contents of the receive register
to the receive buffer register. The RI
i
OER
i
, FER
i
, PER
i
, and SUM
i
flags are cleared when the low order byte of the receive buffer reg-
ister is read or when the RE
i
flag is cleared.
Sleep mode
The sleep mode is used to communicate only between certain mi-
crocomputers when multiple microcomputers are connected
through serial I/O.
The sleep mode is entered when the bit 7 of UART
i
transmit/re-
ceive mode register is set.
The operation of the sleep mode for an 8-bit asynchronous com-
munication is described below.
When sleep mode is selected, the contents of the receive register
is not transferred to the receive buffer register if bit 7 (bit 6 if 7-bit
asynchronous communication and bit 8 if 9-bit asychronous com-
munication) of the received data is “0”. Also the RI
i
, OER
i
, FER
i
,
PER
i
, and the SUM
i
flag are unchanged. Therefore, the interrupt
request bit of the UART
i
receive interrupt control register is also
unchanged.
Normal receive operation takes place when bit 7 of the received
data is “1”.
The following is an example of how the sleep mode can be used.
The main microcomputer first sends data with bit 7 set to “1” and
bits 0 to 6 set to the address of the subordinate microcomputer
which wants to communicate with. Then all subordinate microcom-
puters receive the same data. Each subordinate microcomputer
checks the received data, clears the sleep bit if bits 0 to 6 are its
own address and sets the sleep bit if not. Next the main micro-
computer sends data with bit 7 cleared. Then the microcomputer
with the sleep bit cleared will receive the data, but the microcom-
puter with the sleep bit set will not. In this way, the main
microcomputer is able to communicate with only the designated
microcomputer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37702S1AFP | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M37702S1BFP | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M37702M2A | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M37702M2B | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M37702M2AXXXFP | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37702M2A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2A-278FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2AXXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2A-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2BXXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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