20
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(3) One-shot pulse mode [10]
Figure 20 shows the bit configuration of the timer Ai mode register
during one-shot pulse mode. In one-shot pulse mode, bit 0 and bit
5 must be “0” and bit 1 and bit 2 must be “1”.
The trigger is enabled when the count start flag is “1”. The trigger
can be generated by software or it can be input from the TAi
IN
pin.
Software trigger is selected when bit 4 is “0” and the input signal
from the TAi
IN
pin is used as the trigger when it is “1”.
Bit 3 is used to determine whether to trigger at the fall of the trig-
ger signal or at the rise. The trigger is at the fall of the trigger
signal when bit 3 is “0” and at the rise of the trigger signal when it
is “1”.
Software trigger is generated by setting the bit in the one-shot
start flag corresponding to each timer.
Figure 21 shows the bit configuration of the one-shot start flag.
As shown in Figure 22, when a trigger signal is received, the
counter counts the clock selected by bits 6 and 7.
If the contents of the counter is not 0000
16
, the TAi
OUT
pin goes
“H” when a trigger signal is received. The count direction is decre-
ment.
When the counter reaches 0001
16
, The TAi
OUT
pin goes “L” and
count is stopped. The contents of the reload register is transferred
to the counter. At the same time, and interrupt request signal is
generated and the interrupt request bit in the timer Ai interrupt
control register is set. This is repeated each time a trigger signal is
received. The output pulse width is
1
pulse frequency of the selected clock
(counter’s value at the time of trigger).
If the count start flag is “0”, TAi
OUT
goes “L”. Therefore, the value
corresponding to the desired pulse width must be written to timer
Ai before setting the timer Ai count start flag.
As shown in Figure 23, a trigger signal can be received before the
operation for the previous trigger signal is completed. In this case,
the contents of the reload register is transferred to the counter by
the trigger and then that value is decremented.
Except when retriggering while operating, the contents of the re-
load register is not transferred to the counter by triggering.
When retriggering, there must be at least one timer count source
cycle before a new trigger can be issued.
Data write is performed to the same way as for timer mode. When
data is written in timer Ai halted, it is also written to the reload reg-
ister and the counter.
When data is written to timer Ai which is busy, the data is written to
the reload register, but not to the counter. The counter is reloaded
with new data from the reload register at the next reload time.
Undefined data is read when timer Ai is read.
Fig. 20 Timer Ai mode register bit configuration during one-
shot pulse mode
Fig. 21 One-shot start flag bit configuration
Timer A0 mode register 56
16
Timer A1 mode register 57
16
Timer A2 mode register 58
16
Timer A3 mode register 59
16
Timer A4 mode register 5A
16
Addresses
1 : Always “1” in one-shot pulse
mode
0
: Software trigger
1
0 : Trigger at the falling edge of
TAi
IN
input
1 1 : Trigger at the rising edge of
TAi
IN
input
0 : Always “0” in one-shot pulse
mode
Clock source selection
0 0 : Select f
2
0 1 : Select f
16
1 0 : Select f
64
1 1 : Select f
512
1 0 : Always “10” in one-shot
pulse mode
7 6 5 4 3 2 1 0
0
1 0
1
7
0
6 5 4 3 2 1
One-shot start flag
Timer A0 one-shot start flag
Timer A1 one-shot start flag
Timer A2 one-shot start flag
Timer A3 one-shot start flag
Timer A4 one-shot start flag
Address
42
16