參數(shù)資料
型號： M37643M8-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁數(shù)： 113/120頁
文件大?。?/td> 1253K
代理商： M37643M8-XXXHP
92
7643 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to
change.
qErase All Blocks Command (2016/2016)
By writing the command code “2016” in the first bus cycle and the
confirmation command code “2016” in the second bus cycle that
follows, the operation of erase all blocks (erase and erase verify)
starts.
Whether the erase all blocks command is terminated can be con-
____
firmed by reading the status register or the RY/BY Status Flag of
flash memory control register. When the erase all blocks operation
starts, the read status register mode is entered automatically and
the contents of the status register can be read out at the data bus
(DB0 to DB7). The status register bit 7 (SR7) is set to “0” at the
same time the erase operation starts and is returned to “1” upon
completion of the erase operation. In this case, the read status
register mode remains active until another command is written.
____
The RY/BY Status Flag is “0” during erase operation and “1” when
the erase operation is completed as is the status register bit 7
(SR7).
After the erase all blocks end, erase results can be checked by
reading bit 5 (SRS) of the status register. For details, refer to the
section where the status register is detailed.
qBlock Erase Command (2016/D016)
By writing the command code “2016” in the first bus cycle and the
confirmation command code “D016” and the blobk address in the
second bus cycle that follows, the block erase (erase and erase
verify) operation starts for the block address of the flash memory
to be specified.
Whether the block erase operation is completed can be confirmed
____
by reading the status register or the RY/BY Status Flag of flash
memory control register. At the same time the block erase opera-
tion starts, the read status register mode is automatically entered,
so that the contents of the status register can be read out. The
status register bit 7 (SR7) is set to “0” at the same time the block
erase operation starts and is returned to “1” upon completion of
the block erase operation. In this case, the read status register
mode remains active until the read array command (FF16) is writ-
ten.
____
The RY/BY Status Flag is “0” during block erase operation and “1”
when the block erase operation is completed as is the status reg-
ister bit 7.
After the block erase ends, erase results can be checked by read-
ing bit 5 (SRS) of the status register. For details, refer to the
section where the status register is detailed.
Write 2016
2016/D016
Block address
Erase completed
NO
YES
Start
Write
SR5 = 0 ?
Erase error
YES
NO
2016:Erase all blocks command
D016:Block erase command
SR7 = 1 ?
or
RY/BY = 1 ?
Status register
read
Fig. 82 Erase flowchart
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