參數(shù)資料
型號(hào)： M37548G1FP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 33/73頁
文件大?。?/td> 1255K
代理商： M37548G1FP
Rev.2.00
REJ03B0210-0200
Mar 15, 2007
Page 33 of 70
7548 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Serial Interface
Serial I/O
Serial I/O can be used as either clock synchronous or
asynchronous (UART) serial I/O. A dedicated timer is also
provided for baud rate generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
serial I/O mode selection bit of the serial I/O control register (bit
6) to “1”.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB.
Fig 43. Block diagram of clock synchronous serial I/O
Fig 44. Operation of clock synchronous serial I/O function
Serial I/O control register
Receive buffer register 1
Receive shift register 1
Clock control circuit
1/4
Baud rate generator
φ
SOURCE
1/4
Clock control circuit
Falling-edge detector
Transmit buffer register
Transmit shift register
Serial I/O status register
F/F
Address 0018
16
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Shift clock
Serial I/O synchronous
clock selection bit
Frequency division ratio 1/(n+1)
Address 001C
16
BRG count source selection bit
Address 0018
16
Shift clock
Transmit shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request (TI)
Transmit interrupt source selection bit
Address 0019
16
Address 001A
16
Data bus
Data bus
P0
6
/S
CLK
P0
4
/R
X
D
P0
5
/T
X
D
P0
7
/S
RDY
D
7
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
0
D
1
D
2
D
3
D
4
D
5
D
6
RBF = 1
TSC = 1
TBE = 0
TBE = 1
TSC = 0
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output TxD
Serial input RxD
Write pulse to receive/transmit
buffer register 1 (address 0018
16
)
Overrun error (OE)
detection
Notes 1:
As the transmit interrupt (TI), which can be selected, either when the transmit buffer has emptied (TBE=1) or after
the transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the
serial I/O control register.
2:
If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial
data is output continuously from the TxD pin.
3:
The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
Receive enable signal S
RDY
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