參數(shù)資料
型號(hào)： M37548G1FP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 15/73頁(yè)
文件大?。?/td> 1255K
代理商： M37548G1FP
Rev.2.00
REJ03B0210-0200
Mar 15, 2007
Page 15 of 70
7548 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/
output direction of each pin. Each bit in a direction register
corresponds to one pin, and each pin can be set to be input or
output.
When “1” is set to the bit corresponding to a pin, this pin
becomes an output port. When “0” is set to the bit, the pin
becomes an input port.
When data is read from a pin set to output, not the value of the
pin itself but the value of port latch is read. Pins set to input are
floating, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to
and the pin remains floating.
If the port P2
0
is used as output port, write “1” to the port
P2
0
direction register after reset.
Set “1” to bits 6 and 7 of the port P1 direction register.
Set “1” to bits 0 and 1 of the port P3 direction register.
[Port P0 drive capacity control register] DCCR
By setting the Port P0 drive capacity control register (address
000C
16
), the drive capacity of the N-channel output transistor for
the port P0 can be selected.
[Pull-up control registers] PULL0, PULL1
By setting the pull-up control registers (address 000D
16
and
000E
16
), ports P0 and P1 can exert pull-up control by program.
However, this is valid only when the port direction registers are
set to input.
When they are set to output, setting “pull-up on” does not pull up
the ports.
Fig 13. Structure of port P0 drive capacity control
register
Fig 14. Structure of port P0 pull-up control register
Fig 15. Structure of port P1 control register
Fig 16. Structure of port P3 direction register
b7
b0
Port P0
0
drive capacity selection bit
Port P0
1
drive capacity selection bit
Port P0
2
drive capacity selection bit
Port P0
3
drive capacity selection bit
Port P0
4
drive capacity selection bit
Port P0
5
drive capacity selection bit
Port P0
6
drive capacity selection bit
Port P0
7
drive capacity selection bit
0: weakness
1: strength
Port P0 drive capacity control register
(DCCR: address 000C
16
, initial value: 00
16
)
b7
b0
P0
0
pull-up control bit
P0
1
pull-up control bit
P0
2
pull-up control bit
P0
3
pull-up control bit
P0
4
pull-up control bit
P0
5
pull-up control bit
P0
6
pull-up control bit
P0
7
pull-up control bit
0: Pull-up is disabled
1: Pull-up is enabled
Port P0 pull-up control register
(PULL0: address 000D
16
, initial value: 00
16
)
b7
b0
P1
0
pull-up control bit
P1
1
pull-up control bit
P1
2
pull-up control bit
P1
3
pull-up control bit
P1
4
pull-up control bit
P1
5
pull-up control bit
Set “0” to these bits certainly
0: Pull-up OFF
1: Pull-up ON
Port P1 pull-up control register
(PULL1: address 000E
16
, initial value: 00
16
)
b7
b0
Set “1” to these bits certainly
Not used (returns “0” when read)
Port P3 direction register
(P3D: address 0007
16
, initial value: 00
16
)
Note: Set “03
16
” to the port P3 direction register, though the port P3 pins are
nothing.
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