參數(shù)資料
型號: M37281MAH-XXXSP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 17/172頁
文件大小: 1319K
代理商: M37281MAH-XXXSP
Rev.1.01 2003.07.16 page 17 of 170
M37281MAH
XXXSP,M37281MFH
XXXSP,M37281MKH
XXXSP, M37281EKSP
Fig. 8.2.6 Memory Map of Special Function Register 2 (SFR2) (1)
:
:
:
<
S
0
1
t
a
t
:
:
e
0
i
m
m
i
m
e
m
d
i
a
d
t
i
e
a
l
t
y
e
l
a
y
f
t
a
e
r
t
e
r
e
r
s
r
e
e
t
>
s
N
a
m
e
:
:
e
f
e
t
:
I
n
f
d
t
e
e
t
e
r
r
m
s
i
n
t
a
t
e
i
m
m
e
d
i
a
t
e
l
y
a
r
e
e
1
i
m
m
e
d
i
a
t
e
l
y
a
f
t
e
r
r
e
s
e
t
1
0
b
7
0 b
7
b0
0
1
0
1
6
0
1
0
1
0
1
6
6
0
1
0
1
F
1
6
P
W
0
P
W
1
P
W
2
P
W
3
P
W
4
P
W
5
P
W
6
P
N
3
R
S
E
1
R
S
E
2
R
S
E
O
3
1
R
S
E
5
IN
3
P
L
O
T
L
O
T
A
S
A
S
D
E
E
D
E
A
/
L
L
/
L
I
N
N
T
T
3
3
P
IN
3
S
O
3
D
/
I
S
M
0
R
E
1
1
R
E
2
2
R
E
3
3
S
M
4
R
E
5
5
M
O
I
N
T
M
M
M
M
P
C
0
R
P
C
E
1
R
P
C
E
2
R
RC3 RC2 RC1 RC0
E
3
P
C
4
R
P
RC5 RC4
C
E
5
P
L
P
T
T
A
S
A
D
D
O
/
L
I
N
7
T
3
C
6
P
C
R
C
E
S
1
R
C
E
S
2
A
S
D
E
/
L
I
N
T
3
C
S
0
E
O
E
O
R
E
O
R
O
C
R
1
3
R
2
3
R
3
T
B
B
2
0
T
B
B
2
1
2
0
2
1
0
1
0
1
6
0
1
0
1
6
P
N
0
0
O
C
3
0
C
1
C
2
6
6
6
6
0
7
1
6
B
1
7 B
B
1
6 B
B
1
5 B
B
1
4 B
B
1
3 B
B
1
2 B
B
1
1 B
B
1
0
T
B
1
7 T
B
1
6 T
B
1
5 T
B
1
4 T
B
1
3 T
B
1
2 T
B
1
1 T
B
1
0
6
O
C
2
7
O
C
0
2
5 O
C
0
2
4 O
C
0
2
3 O
C
1
2 O
C
2
1 O
C
2
0
C
3
O
C
3
4
R
E
1
R
E
0
2
R
E
0
6
3
R
E
5
A
S
D
E
/
L
I
N
T
3
0
1
0
1
6
6
8
0
1
0
1
0
1
6
6
C
2
6
R
C
R
0
C
R
1
P
N
4
P
O
L
2P
L
O
C
3
5
O
3
6
C
3
7
6
6
0
Address
Register
200
16
PWM0 register (PWM0)
201
16
PWM1 register (PWM1)
202
16
PWM2 register (PWM2)
203
16
PWM3 register (PWM3)
204
16
PWM4 register (PWM4)
205
16
PWM5 register (PWM5)
205
16
PWM6 register (PWM6)
207
16
208
16
209
16
20A
16
20B
16
20C
16
20D
16
20E
16
20F
16
210
16
211
16
212
16
213
16
214
16
215
16
216
16
217
16
218
16
219
16
OSD control register 3(OC3)
Timer 5 (TM5)
Timer 6 (TM6)
Top border control register 1 (TB1)
Bottom border control register 1 (BB1)
Top border control register 2 (TB2)
Bottom border control register 2 (BB2)
21A
16
21B
16
21C
16
21D
16
21E
16
21F
16
PWM7 register (PWM7)
PWM mode register 1 (PN)
PWM mode register 2 (PW)
ROM correction address 1 (high-order)
ROM correction address 1 (low-order)
ROM correction address 2 (high-order)
ROM correction address 2 (low-order)
ROM correction enable register (RCR)
Test register
Interrupt input polarity register (IP)
Serial I/O mode register (SM)
Serial I/O register (SIO)
OSD control register 2(OC2)
Clock control register (CS)
I/O polarity control register (PC)
Raster color register (RC)
I
SFR2 area (addresses 200
16
to 21F
16
)
<
Bit allocation
>
Function bit
No function bit
Fix to this bit to
0
(do not write to
1
)
Fix to this bit to
1
(do not write to
0
)
Bit allocation
State immediately after reset
RC7 RC6
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