參數(shù)資料
型號(hào)： M37274EFSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, MICROCONTROLLER, PDIP52
封裝： 0.600 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-52
文件頁數(shù)： 59/147頁
文件大?。?/td> 2042K
代理商： M37274EFSP
19
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274EFSP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
paramentic
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
Fig. 11. Interrupt Request Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register 1 (IREQ1) [Address 00FC
B
Name
Functions
After reset RW
Interrupt Request Register 1
0
0 : No interrupt request issued
1 : Interrupt request issued
Timer 1 interrupt
request bit
(TM1R)
1
Timer 2 interrupt
request bit
(TM2R)
2
Timer 3 interrupt
request bit
(TM3R)
3
Timer 4 interrupt
request bit
(TM4R)
4
OSD interrupt request
bit
(CRTR)
5VSYNC interrupt
request bit
(VSCR)
6
A-D conversion INT3
interrupt request bit (ADR)
7
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0
V
0
V
0
V
0
V
0
V
0
V
0
V
V: “0” can be set by software, but “1” cannot be set.
—
16
]
R
Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
Fig. 12. Interrupt Request Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register 2 (IREQ2) [Address 00FD
B
Name
Functions
After reset RW
Interrupt Request Register 2
0
INT1 interrupt
request bit (INT1R)
0 : No interrupt request issued
1 : Interrupt request issued
1
Data slicer interrupt
request bit (DSR)
2
Serial I/O interrupt
request bit (SIOR)
3
4
INT2 interrupt
request bit (INT2R)
5
7
Fix this bit to “0.”
0
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0
V: “0” can be set by software, but “1” cannot be set.
0
V
0
V
0
V
0
V
0 : No interrupt request issued
1 : Interrupt request issued
16
]
R
R V
R
R V
RW
f(XIN)/4096 interrupt
request bit (1MSR)
0 : No interrupt request issued
1 : Interrupt request issued
Multi-master I2C-BUS
interrupt request bit (IICR)
0 : No interrupt request issued
1 : Interrupt request issued
6
Timer 5 6 interrupt
request bit (T56R)
0 : No interrupt request issued
1 : Interrupt request issued
0
V
R
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