參數(shù)資料
型號(hào)： M37274EFSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, MICROCONTROLLER, PDIP52
封裝： 0.600 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-52
文件頁數(shù)： 37/147頁
文件大?。?/td> 2042K
代理商： M37274EFSP
131
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274EFSP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
paramentic
limits
are
subject
to change.
I2C Data Shift Register
Timer Mode Register 2
Address 00F516
Address 00F616
b7 b6 b5 b4 b3 b2 b1 b0
Timer mode register 2 (TM2) [Address 00F516]
B
After reset RW
Timer Mode Register 2
0
Name
Functions
Timer 3 count source
selection bit (TM20)
0
RW
1, 4 Timer 4 count source
selection bits
(TM21, TM24)
0R W
2
3
0
Timer 3 count
stop bit (TM22)
0: Count start
1: Count stop
Timer 4 count stop bit
(TM23)
0: Count start
1: Count stop
0
5
Timer 5 count stop bit
(TM25)
0: Count start
1: Count stop
0
6
Timer 6 count stop bit
(TM26)
0: Count start
1: Count stop
0
RW
7
Timer 5 count source
selection bit 1
(TM27)
0: f(XIN)/16 or f(XCIN)/16 (See note)
1: Count source selected by bit 6
of TM1
b0
0
0 : f(XIN)/16 or f(XCIN)/16 (See note)
0
1 : f(XCIN)
1
0 :
1
1 :
(b6 at address 00C716)
External clock from TIM3 pin
b4 b1
0
0 : Timer 3 overflow signal
0
1 : f(XIN)/16 or f(XCIN)/16 (See note)
1
0 : f(XIN)/2 or f(XCIN)/2 (See note)
1
1 : f(XCIN)
Note: Either f(XIN) or f(XCIN) is selected by bit 7 of the CPU mode register.
b7 b6 b5 b4 b3 b2 b1 b0
I C data shift register1(S0) [Address 00F616]
B
Functions
After reset
RW
I C Data Shift Register
0
to
7
This is an 8-bit shift register to store
receive data and write transmit data.
Indeterminate
2
Note:
2
To write data into the I C data shift register after setting the MST bit to
“0” (slave mode), keep an interval of 8 machine cycles or more.
D0 to D7
RW
Name
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