參數(shù)資料
型號(hào)： M36WT864T10ZA6T
廠商： 意法半導(dǎo)體
英文描述： 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
中文描述： 64兆位4Mb的x16插槽，多銀行，突發(fā)閃存和8兆位的SRAM為512k x16，內(nèi)存產(chǎn)品多
文件頁(yè)數(shù)： 25/92頁(yè)
文件大小： 624K
代理商： M36WT864T10ZA6T
25/92
M36WT864TF, M36WT864BF
Setup Phase.
The Quadruple Enhanced Factory
Program command requires one Bus Write opera-
tion to initiate the load phase. After the setup
command is issued, read operations output the
Status Register data. The Read Status Register
command must not be issued as it will be
interpreted as data to program.
Load Phase.
The Load Phase requires 4 cycles
to load the data (refer to Table 7, Factory Program
Commands and Figure 37, Quadruple Enhanced
Factory Program Flowchart). Once the first Word
of each Page is written it is impossible to exit the
Load phase until all four Words have been written.
Two successive steps are required to issue and
execute the Load Phase of the Quadruple En-
hanced Factory Program command.
1. Use one Bus Write operation to latch the Start
Address and the first Word of the first Page to
be programmed. For subsequent Pages the first
Word address can remain the Start Address (in
which case the next Page is programmed) or
can be any address in the same block. If any
address is given that is not in the same block as
the Start Address, the device enters the Exit
Phase. For the first Load Phase Status Register
bit SR7 should be read after the first Word has
been issued to check that the command has
been accepted (bit 7 set to ‘0’). This check is not
required for subsequent Load Phases. Status
Register bit SR0 should be read to check that
the P/E.C. is ready for the next Word.
2. Each subsequent Word to be programmed is
latched with a new Bus Write operation. The
address is only checked for the first Word of
each Page as the order of the Words to be
programmed is fixed. The Status Register bit
SR0 should be read between each Bus Write
cycle to check that the P/E.C. is ready for the
next Word.
The memory is now set to enter the Program and
Verify Phase.
Program and Verify Phase.
In the Program and
Verify Phase the four Words that were loaded in
the Load Phase are programmed in the memory
array and then verified by the Program/Erase Con-
troller. If any errors are found the Program/Erase
Controller reprograms the location. During this
phase the Status Register shows that the Pro-
gram/Erase Controller is busy, Status Register bit
SR7 set to ‘0’, and that the device is not waiting for
new data, Status Register bit SR0 set to ‘1’. When
Status Register bit SR0 is set to ‘0’ the Program
and Verify phase has terminated.
Once the Verify Phase has successfully complet-
ed subsequent pages in the same block can be
loaded and programmed. The device returns to
the beginning of the Load Phase by issuing one
Bus Write operation to latch the Address and the
first of the four new Words to be programmed.
Exit Phase.
Finally, after all the pages have been
programmed, write one Bus Write operation with
data FFFFh to any address outside the block con-
taining the Start Address, to terminate the Load
and Program and Verify Phases.
If the Program and Verify Phase has successfully
completed the memory returns to Read mode. If
the P/E.C. fails to program and reprogram a given
location, the error will be signaled in the Status
Register.
Status Register bit SR7 set to ‘1’ and bit 0 set to ‘0’
indicate that the device has returned to Read
mode. A full Status Register check should be done
to ensure that the block has been successfully pro-
grammed. See the section on the Status Register
for more details.
相關(guān)PDF資料
PDF描述
M36WT864TF 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864B85ZA6T 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864T70ZA6T 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864TFZA 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864BFZA 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M36WT864T70ZA6T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864T85ZA6T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864TF 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
M36WT864TF70ZA6T 功能描述:組合存儲(chǔ)器 64M (4Mx16) 70ns RoHS:否 制造商:Microchip Technology 組織:512 K x 16 電源電壓-最大: 電源電壓-最小: 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:LFBGA-48 封裝:Tray
M36WT864TFZA 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit 512K x16 SRAM, Multiple Memory Product
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