參數資料
型號： M36D0R6040T0ZAIT
廠商： 意法半導體
英文描述： 64 Mbit (4Mb x16, Multiple Bank, Page) Flash Memory and 16 Mbit (1Mb x16) PSRAM, Multi-Chip Package
中文描述： 64兆位（4Mb的x16插槽，多銀行，頁）閃存和16兆位（最快1Mb × 16）移動存儲芯片，多芯片封裝
文件頁數： 7/18頁
文件大小： 329K
代理商： M36D0R6040T0ZAIT
7/18
M36D0R6040T0, M36D0R6040B0
If V
PPF
is kept in a low voltage range (0V to V
DDF
)
V
PPF
is seen as a control input. In this case a volt-
age lower than V
PPLKF
gives an absolute protec-
tion against Program or Erase, while V
PPF
> V
PP1F
enables these functions (see Tables
7
and
8
, DC
Characteristics for the relevant values). V
PPF
is
only sampled at the beginning of a Program or
Erase; a change in its value after the operation has
started does not have any effect and Program or
Erase operations continue.
If V
PPF
is in the range of V
PPHF
it acts as a power
supply pin. In this condition V
PPF
must be stable
until the Program/Erase algorithm is completed.
V
SS
Ground.
V
SS
is the common ground refer-
ence for all voltage measurements in the Flash
(core and I/O Buffers) and PSRAM chips.
Note: Each Flash memory device in a system
should have its supply voltage (V
DDF
) and the
program supply voltage V
PPF
decoupled with a
0.1μF ceramic capacitor close to the pin (high
frequency, inherently low inductance capaci-
tors should be as close as possible to the
package). See
Table 5., AC Measurement Load
Circuit
. The PCB track widths should be suffi-
cient to carry the required V
PPF
program and
erase currents.
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參數描述
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