參數(shù)資料
型號: M34556M8H-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 42/147頁
文件大?。?/td> 1087K
代理商: M34556M8H-XXXFP
Rev.3.02
Dec 22, 2006
page 134 of 142
REJ03B0025-0302
4556 Group
RECOMMENDED OPERATING CONDITIONS 1
(One Time PROM version: Ta = –20 °C to 85 °C, VDD = 1.8 to 3.6 V, unless otherwise noted)
Symbol
VDD
VRAM
VSS
VLC3
VIH
VIL
IOH(peak)
IOH(avg)
IOL(peak)
IOL(avg)
ΣIOH(avg)
ΣIOL(avg)
Parameter
Supply voltage
(when ceramic resonator is used)
Supply voltage
(when quartz-crystal/on-chip
oscillator is used)
Supply voltage
(when RC oscillation is used)
RAM back-up voltage
Supply voltage
LCD power supply (Note 1)
“H” level input voltage
“L” level input voltage
“H” level peak output current
“H” level average output current
(Note 2)
“L” level peak output current
“L” level average output current
(Note 2)
“H” level total average current
“L” level total average current
Notes 1: At 1/2 bias: VLC1 = VLC2 = (1/2)VLC3
At 1/3 bias: VLC1 = (1/3)VLC3, VLC2 = (2/3)VLC3
2: The average output current is the average value during 100 ms.
Unit
Conditions
f(STCK)
≤ 4.4 MHz
f(STCK)
≤ 2.2 MHz
f(STCK)
≤ 1.1 MHz
f(STCK)
≤ 4.4 MHz
at RAM back-up mode
P0, P1, P2, D0–D5
XIN, XCIN
RESET
INT
CNTR
P0, P1, P2, D0–D5
XIN, XCIN
RESET
INT
CNTR
P0, P1, P2, D0–D5
C, CNTR
P0, P1, P2, D0–D5
C, CNTR
P0, P1, P2, D0–D7,
C, CNTR
RESET
P0, P1, P2, D0–D7,
C, CNTR
RESET
P0, P1, P2, D0–D5, C, CNTR
D6, D7, RESET
Max.
3.6
VDD
0.2VDD
0.3VDD
0.15VDD
–10
–15
–5
–10
12
4
7
2
–40
60
Limits
Min.
2.7
2
1.8
2.7
1.6
1.8
0.8VDD
0.7VDD
0.85VDD
0.8VDD
0
Typ.
0
VDD = 3 V
V
mA
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