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參數(shù)資料
| 型號： | M34524MC-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 120/161頁 |
| 文件大?。?/td> | 1199K |
| 代理商： | M34524MC-XXXFP |
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Rev.2.00
Jul 27, 2004
page 61 of 159
REJ03B0091-0200Z
4524 Group
(5) LCD power supply circuit
Select the LCD power circuit suitable for the LCD panel.
The LCD control circuit structure is fixed by the following setting.
Set the control of internal dividing resistor by bit 0 of register L2.
Select the internal dividing resistor by bit 3 of register L1.
Select the bias condition by bits 0 and 1 of register L1.
Internal dividing resistor
The 4524 Group has the internal dividing resistor for LCD power
supply.
When bit 0 of register L2 is set to “0”, the internal dividing resis-
tor is valid. However, when the LCD is turned off by setting bit 2
of register L1 to “0”, the internal dividing resistor is turned off.
The same six resistor (r) is prepared for the internal dividing re-
sistor. According to the setting value of bit 3 of register L1 and
using bias condition, the resistor is prepared as follows;
L13 = “0”, 1/3 bias used: 2r 3 = 6r
L13 = “0”, 1/2 bias used: 2r 2 = 4r
L13 = “1”, 1/3 bias used: r 3 = 3r
L13 = “1”, 1/2 bias used: r 2 = 2r
VLC3/SEG0 pin
The selection of VLC3/SEG0 pin function is controlled with the bit 3
of register L2.
When the VLC3 pin function is selected, apply voltage of VLC3 <
VDD to the pin externally.
When the SEG0 pin function is selected, VLC3 is connected to VDD
internally.
VLC2/SEG1, VLC1/SEG2 pin
The selection of VLC2/SEG1 pin function is controlled with the bit 2
of register L2.
The selection of VLC1/SEG2 pin function is controlled with the bit 1
of register L2.
When the VLC2 pin and VLC1 pin functions are selected and the in-
ternal dividing resistor is not used, apply voltage of
0<VLC1<VLC2<VLC3 to these pins. Short the VLC2 pin and VLC1 pin
at 1/2 bias.
When the VLC2 pin and VLC1 pin functions are selected and the in-
ternal dividing resistor is used, the dividing voltage value
generated internally is output from the VLC1 pin and VLC2 pin. The
VLC2 pin and VLC1 pin has the same electric potential at 1/2 bias.
When SEG1 and SEG2 pin function is selected, use the internal di-
viding resistor. In this time, VLC2 and VLC1 are connected to the
generated dividingg voltage.
Fig. 46 LCD power source circuit example (1/3 bias condition selected)
VLC3
VLC2
VLC1
SEG0
SEG1
SEG2
VLC3
VLC2
VLC1
VLC3
SEG1
SEG2
a) Register L2 = (0000)2
b) Register L2 = (1000)2
VLC3
VLC2
VLC1
VLC3
VLC2
VLC1
VLC3
VLC2
VLC1
c) Register L2 = (1110)2
d) Register L2 = (1111)2
VLC3
VLC2
VLC1
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