參數(shù)資料
型號： M34524MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù)： 117/161頁
文件大?。?/td> 1199K
代理商： M34524MC-XXXFP
Rev.2.00
Jul 27, 2004
page 59 of 159
REJ03B0091-0200Z
4524 Group
(3) LCD RAM
RAM contains areas corresponding to the liquid crystal display.
When “1” is written to this LCD RAM, the display pixel correspond-
ing to the bit is automatically displayed.
(4) LCD drive waveform
When “1” is written to a bit in the LCD RAM data, the voltage differ-
ence between common pin and segment pin which correspond to
the bit automatically becomes lVLC3l and the display pixel at the
cross section turns on.
When returning from reset, and in the RAM back-up mode, a dis-
play pixel turns off because every segment output pin and common
output pin becomes VLC3 level.
Fig. 44 LCD RAM map
Table 18 LCD control registers
Z
X
Y
Bits
8
9
10
11
12
13
14
15
COM
1
14
3
2103
2
103
21
0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
COM3
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
COM2
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
COM1
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
COM0
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
COM3 COM2 COM1 COM0 COM3 COM2 COM1 COM0
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG0
SEG0 SEG0
SEG8
SEG17
SEG18
SEG19
SEG16
SEG8 SEG8 SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG17
SEG18
SEG19
SEG16
SEG17
SEG18
SEG19
SEG16
SEG17
SEG18
SEG19
SEG16
12
13
Note: The area marked “
” is not the LCD display RAM.
Internal dividing resistor for LCD power
supply selection bit (Note 2)
LCD control bit
LCD control register L1
L13
L12
L11
L10
at reset : 00002
at power down : state retained
0
1
0
1
L11
0
1
L10
0
1
0
1
Duty
1/2
1/3
1/4
Bias
1/2
1/3
LCD control register L2
at reset : 11112
at power down : state retained
W
TL2A
0
1
0
1
0
1
0
1
SEG0
VLC3
SEG1
VLC2
SEG2
VLC1
Internal dividing resistor valid
Internal dividing resistor invalid
L23
L22
L21
L20
VLC3/SEG0 pin function switch bit (Note 3)
VLC2/SEG1 pin function switch bit (Note 4)
VLC1/SEG2 pin function switch bit (Note 4)
Internal dividing resistor for LCD power
supply control bit
2r 3, 2r 2
r 3, r 2
Off
On
Not available
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: “r (resistor) multiplied by 3” is used at 1/3 bias, and “r multiplied by 2” is used at 1/2 bias.
3: VLC3 is connected to VDD internally when SEG0 pin is selected.
4: Use internal dividing resistor when SEG1 and SEG2 pins are selected.
R/W
TAL1/TL1A
LCD duty and bias selection bits
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