參數(shù)資料
型號(hào)： M34524EDFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁(yè)數(shù)： 41/66頁(yè)
文件大?。?/td> 1936K
代理商： M34524EDFP
Rev.1.04
Aug 23, 2007
Page 46 of 146
REJ03B0188-0104
4559 Group
(5) LCD power supply circuit
Select the LCD power supply circuit suitable for the using LCD
panel.
The LCD power supply circuit is fixed by the followings;
The internal dividing resistor is controlled by bit 0 of register
L2.
The internal dividing resistor is selected by bit 3 of register L1.
The bias condition is selected by bits 0 and 1 of register L1.
Internal dividing resistor
The 4553 Group has the internal dividing resistor for LCD power
supply.
When bit 0 of register L2 is set to ì0, the internal dividing
resistor is valid. However, when the LCD is turned off by setting
bit 2 of register L1 to ì0, the internal dividing resistor is turned
off.
The same six resistor (r) is prepared for the internal dividing
resistor.
According to the setting value of bit 3 of register L1 and using
bias condition, the resistor is prepared as follows;
L13 = “0”, 1/3 bias used: 2r × 3 = 6r
L13 = “0”, 1/2 bias used: 2r × 2 = 4r
L13 = “1”, 1/3 bias used: r × 3 = 3r
L13 = “1”, 1/2 bias used: r × 2 = 2r
SEG0/VLC3 pin
The selection of SEG0/VLC3 pin function is controlled with the
bit 3 of register L2.
When the VLC3 pin function is selected, apply voltage of VLC3 <
VDD to the pin externally.
When the SEG0 pin function is selected, VLC3 is connected to
VDD internally.
SEG1/VLC2, SEG2/VLC1 pin
The selection of SEG1/VLC2 pin function is controlled with the
bit 2 of register L2.
The selection of SEG2/VLC1 pin function is controlled with the
bit 1 of register L2.
When the VLC2 pin and VLC1 pin functions are selected and the
internal dividing resistor is not used, apply voltage of 0 < VLC1 <
VLC2 < VLC3 to these pins. Short the VLC2 pin and VLC1 pin at
1/2 bias.
When the VLC2 pin and VLC1 pin functions are selected and the
internal dividing resistor is used, the dividing voltage value
generated internally is output from the VLC1 pin and VLC2 pin.
The VLC2 pin and VLC1 pin have the same electric potential at
1/2 bias.
When SEG1 and SEG2 pin functions are selected, use the
internal dividing resistor (L20 = ”0”). In this time, VLC2 and
VLC1 are connected to the generated dividing voltage.
Fig 47. LCD power supply circuit example (1/3 bias condition selected)
VSS
VLC3
VLC2
VLC1
VLC3
SEG1
SEG2
(b) Register L2 = (1000)2
VSS
VLC3
VLC2
VLC1
SEG1
SEG2
(a) Register L2 = (0000)2
VSS
VLC3
VLC2
VLC1
VLC3
(d) Register L2 = (1111)2
VSS
VLC3
VLC2
VLC1
VLC3
(c) Register L2 = (1110)2
External power supply
SEG0
VLC2
VLC1
VLC2
VLC1
External power supply
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