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參數(shù)資料
| 型號： | M30L0R8000B0ZAQ |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| 中文描述： | 256兆位（16Mb的x16插槽，多銀行，多層次，多突發(fā)）1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 82/83頁 |
| 文件大小： | 1363K |
| 代理商： | M30L0R8000B0ZAQ |
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M30L0R8000T0, M30L0R8000B0
82/83
REVISION HISTORY
Table 50. Document Revision History
Date
Version
Revision Details
24-Nov-2003
0.1
First Issue.
27-Apr-2004
0.2
70ns speed class added, maximum operating frequency increased to 66MHz. Dual
operation limitations added (
Table 15.
).
Read CFI Query Command
clarified. Write to
Buffer and Program command renamed Buffer Program.
Ambient temperature conditions modified during Buffer Enhanced Factory Program
operations. Notes to
Table 17., Program/Erase Times and Endurance Cycles
modified. I
DD1
(for f=54MHz), I
DD2
, I
DD3
and I
DD4
, I
DD6
and I
DD7
parameters modified
and I
DD1
(for f=66MHz) added in
Table 21., DC Characteristics - Currents
.
Package specifications updated in
Table 28., TFBGA88 8x10mm - 8x10 ball array,
0.8mm pitch, Package Mechanical Data
.
APPENDIX A., BLOCK ADDRESS TABLES
updated.
Data and/or values modified at address offsets 027h, 02Dh, 02Fh, 021h and 033h in
Table 39., Device Geometry Definition
. Note 2 to Tables
43
,
44
and
45
clarified.
Small text changes.
21-Oct-2004
0.3
Lead-free packages are compliant with the ST ECOPACK specification.
Table 11., Configuration Register
modified. AC waveforms simplified.
Table 48., Command Interface States - Lock Table, Next State
modified.
APPENDIX
C., FLOWCHARTS AND PSEUDO CODES
revised.
70ns speed class removed, operating frequency 66MHz removed.
Daisy chain information removed.
28-Jan-2005
1.0
V
PP
is 12V tolerant (V
PP
max changed in
Table 18., Absolute Maximum Ratings
).
APPENDIX A., BLOCK ADDRESS TABLES
and
APPENDIX D., COMMAND
INTERFACE STATE TABLES
revised. Alt symbol to t
AVWH
and t
AVEH
removed from
Table 25., Write AC Characteristics, Write Enable Controlled
and
Table 26., Write
AC Characteristics, Chip Enable Controlled
.
18-May-2005
2.0
Device changed from PRELIMINARY DATA TO full Datasheet.
t
WHQV
AC parameter removed throughout the document.
V
PP
clarified for enabling program and erase operations in
V
PP
Program Supply
Voltage, page 11
. Clarification of device behavior when block is protected for all
Program commands in the
COMMAND INTERFACE
section.
Wait at Boundary table replaced by
X-Latency Bits (CR13-CR11), page 27
.
Figure 6., X-Latency and Data Output Configuration Example
modified.
V
LKO
modified in
Table 22., DC Characteristics - Voltages
. AC parameter values
t
EHQX
,
t
EHQZ
,
t
GHQX
,
t
GHQZ
and t
GHTZ
modified in
Table 23., Asynchronous Read AC
Characteristics
. t
GLTV
modified in
Figure 13., Single Synchronous Read AC
Waveforms
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30L0R8000B0ZAQE | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0ZAQ | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
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