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| 型號： | M30828MH-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 32/48頁 |
| 文件大?。?/td> | 847K |
| 代理商： | M30828MH-XXXGP |
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2.0 Applications Information
2.1 APPLICATIONS IN RADIATION ENVIRONMENTS
Applying the ADC08D1520 in a radiation environment should
be done with careful consideration to that environment. The
QMLV version of this part has been rated to tolerate a high
total dose of ionizing radiation by test method 1019 of MIL-
STD-883. The part is also immune to SEE (Single Event
Effects) hard errors such as Single Event Latch-up and Func-
tional Interrupts. However, there are still some recommenda-
tions and cautions.
Floating pins.
There are four tri-level pins which activate the
following modes when left floating: FSR/DCLK_RST-, Out-
Edge/DDR/SDATA, DRST_SEL and DES/SCS. If modes re-
quiring a floating pin are needed to be used, then it is strongly
recommended that the floating method of establishing Va/2
on these pins not be employed. Due to the potential of in-
creased leakage of the input protection diodes after large
ionizing doses, the midpoint voltage (Va/2 or 0.95V) should
be voltage forced or formed with a resistor divider from the
analog supply to ground with two 2K ohm resistors. The tol-
erance for this mid point voltage is 650mV
≥ V
A/2 ≤ 1.2V. The
internal voltage divider resistors provide too little current to
set the midpoint voltage reliably in radiation environments.
2.2 THE REFERENCE VOLTAGE
The voltage reference for the ADC08D1520 is derived from a
1.254V bandgap reference, a buffered version of which is
made available at pin 31, V
BG, for user convenience. This
output has an output current capability of ±100
μA and should
be buffered if more current is required.
The internal bandgap-derived reference voltage has a nomi-
nal value V
IN, as determined by the FSR pin and described in
There is no provision for the use of an external reference volt-
age, but the full-scale input voltage can be adjusted through
a Full Scale Register in the Extended Control Mode, as ex-
plained in 1.2 NON-EXTENDED CONTROL/EXTENDED
Differential input signals up to the chosen full-scale level will
be digitized to 8 bits. Signal excursions beyond the full-scale
range will be clipped at the output. These large signal excur-
sions will also activate the OR output for the time that the
signal is out of range. See 2.3.2 Out Of Range (OR) Indica-
tion.
One extra feature of the V
BG pin is that it can be used to raise
the common mode voltage level of the LVDS outputs. The
output offset voltage (V
OS) is typically 800 mV when the VBG
pin is used as an output or left unconnected. To raise the
LVDS offset voltage to a typical value of 1100 mV the V
BG pin
can be connected directly to the supply rails.
2.3 THE ANALOG INPUT
The analog input is a differential one to which the signal
source must be a.c. coupled as shown in Figure 12. In the
Non-Extended Control Mode, the full-scale input range is se-
lected with the FSR pin as specified in the Converter Electrical
Characteristics. In the Extended Control Mode, the full-scale
input range is selected by programming the Full-Scale Volt-
age Adjust register through the Serial Interface. For best
performance, when adjusting the input full-scale range in the
Extended Control, refer to 1.4 REGISTER DESCRIPTION for
guidelines on limiting the amount of adjustment.
Table 8 gives the input to output relationship with the FSR pin
high when the normal (Non-Extended) Mode is used. With the
FSR pin grounded, the millivolt values in Table 8 are reduced
to 75% of the values indicated. In the Extended Control Mode,
these values will be determined by the full scale range and
offset settings in the Control Registers.
TABLE 8. Differential Input To Output Relationship
(Non-Extended Control Mode, FSR High)
V
IN+
V
IN
Output Code
V
CM 225 mV
V
CM + 225 mV
0000 0000
V
CM 113 mV
V
CM + 113 mV
0100 0000
V
CM
V
CM
0111 1111 /
1000 0000
V
CM + 109 mV
V
CM 109 mV
1100 0000
V
CM + 217.5 mV
V
CM 217.5 mV
1111 1111
The buffered analog inputs simplify the task of driving these
inputs and the RC pole that is generally used at sampling ADC
inputs is not required. If it is desired to use an amplifier circuit
before the ADC, use care in choosing an amplifier with ade-
quate noise and distortion performance and adequate gain at
the frequencies used for the application.
IMPORTANT NOTE
: An Analog input channel that is not used
(e.g. in DES Mode) should be left floating when the inputs are
a.c. coupled. Do not connect an unused analog input to
ground.
30024744
FIGURE 12. Differential Input Drive
2.3.1 Handling Single-Ended Input Signals
There is no provision for the ADC08D1520 to adequately pro-
cess single-ended input signals. The best way to handle
single-ended signals is to convert them to differential signals
before presenting them to the ADC. The easiest way to ac-
complish single-ended to differential signal conversion is with
an appropriate balun-connected transformer, as shown in
2.3.1.1. a.c. Coupled Input
The easiest way to accomplish single-ended a.c. Input to dif-
ferential a.c. signal is with an appropriate balun, as shown in
www.national.com
38
ADC08D1520QML
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