deveopmen
Interrupts
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
57
Interrupt source Vector table addresses Remarks
Address (L) to address (H)
Undefined instruction
FFFFDC
16
to FFFFDF
16
Overflow
FFFFE0
16
to FFFFE3
16
BRK instruction
FFFFE4
16
to FFFFE7
16
execution
Interrupt on UND instruction
Interrupt on INTO instruction
If content of FFFFE7
16
is filled with FF
16
, program
starts from the address shown by the vector in the
variable vector table
There is an address-matching interrupt enable bit
Address match
_______
Reset
FFFFE8
16
to FFFFEB
16
FFFFF0
16
to FFFFF3
16
FFFFF8
16
to FFFFFB
16
FFFFFC
16
to FFFFFF
16
External interrupt by input to NMI pin
Table 1.9.1. Interrupt factors (fixed interrupt vector addresses)
Interrupt source
Address (L) to address (H)
BRK2 instruction
Interrupt vector table register for emulator
000020
16
to 000023
16
Single step
Interrupt vector table register for emulator
000020
16
to 000023
16
Vector table addresses
Remarks
Interrupt for debugger
Interrupt for debugger
Table 1.9.2. Interrupt vector table register for emulator
Fixed vector tables
The fixed vector table is a table in which addresses are fixed. The vector tables are located in an area
extending from FFFFDC
16
to FFFFFF
16
. One vector table comprises four bytes. Set the first address
of interrupt routine in each vector table. Table 1.9.1 shows the interrupts assigned to the fixed vector
tables and addresses of vector tables.
Vector table dedicated for emulator
Table 1.9.2 shows interrupt vector address which is vector table register dedicated for emulator
(ad-
dress 000020
16
to 000023
16
). These instructions are not effected with interrupt enable flag (I flag)
(non maskable interrupt).
This interrupt is used exclusively for debugger purposes. You normally do not need to use this inter-
rupt. Do not access to the interrupt vector table register dedicated for emulator
(address 000020
16
to
000023
16
).
Variable vector tables
The addresses in the variable vector table can be modified, according to the user’s settings. Indicate
the first address using the interrupt table register (INTB). The 256-byte area subsequent to the ad-
dress the INTB indicates becomes the area for the variable vector tables. One vector table comprises
four bytes. Set the first address of the interrupt routine in each vector table. Table 1.9.3 shows the
interrupts assigned to the variable vector tables and addresses of vector tables.
Set an even address to the start address of vector table setting in INTB so that operating efficiency is
increased.