deveopmen
Clock Generating Circuit
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
44
Figure 1.8.5. Main clock division register
Main clock division register (Note 1)
Symbol
MCD
Address
000C
16
When reset
XXX01000
2
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
1 0 0 1 0 : No division mode
0 0 0 1 0 : Division by 2 mode
0 0 0 1 1 : Division by 3 mode
0 0 1 0 0 : Division by 4 mode
0 0 1 1 0 : Division by 6 mode
0 1 0 0 0 : Division by 8 mode
0 1 0 1 0 : Division by 10 mode
0 1 1 0 0 : Division by 12 mode
0 1 1 1 0 : Division by 14 mode
0 0 0 0 0 : Division by 16 mode
b4 b3 b2 b1 b0
MCD4
MCD3
MCD1
MCD2
MCD0
Main clock division select
bit (Note 2)
Note 1: Set bit 0 of the protect register (address 000A
16
) to “1” before writing to
this register.
Note 2: These bits are "01000
2
" (8-division mode) when main clock is stopped
or you shift to stop mode.
Note 3: Do not attempt to set combinations of values other than those shown in
this figure.
W
R
AA
AA
AA
AA
AA
AA
AA
Nothing is assigned.
When write, set "0". When read, their contents are indeterminate.
Clock Output
In single chip mode, when the BCLK output function select bit (bit 7 at address 0004
16
:PM07) is “1”, you
can output f
8
, f
32
, or fc from the P5
3
/BCLK/ALE/CLK
OUT
pins by setting the clock output function select
bits (bits 1 and 0 at address 0006
16
:CM01, CM00).(Note)
Even when you set PM07 to “0” and CM01 and CM00 to “00
2
”, no BCLK is output.
In memory expansion mode or microprocessor mode, when the ALE pin select bits (bits 5 and 4 at ad-
dress 0005
16
:PM15, PM14) are other than “01
2
(P5
3
/BCLK)” and PM07 is “1”, you can output f
8
, f
32
, or fc
from the P5
3
/BCLK/ALE/CLK
OUT
pins by setting CM01 and CM00.
In memory expansion mode or microprocessor mode, when PM15 and PM14 are other than “01
2
(P5
3
/
BCLK)” and PM07 is “0” and CM01 and CM00 to “00
2
”, BCLK is output from the P5
3
/BCLK/ALE/CLK
OUT
pins.
When stopping clock output in memory expansion mode or microprocessor mode, set PM07 to “1” and
CM01 and CM00 to “00
2
” (IO port P5
3
). The P5
3
function is not selected. When PM15 and PM14 are “01
2
(P5
3
/BCLK)” and CM01 and CM00 are “00
2
”, PM07 is ignored and the P5
3
pin is set for ALE output.
When the WAIT peripheral function clock stop bit (bit 2 at address 0006
16
) is set to “1”, f
8
or f
32
clock
output is stopped when a WAIT command is executed.
Table 1.8.2 shows clock output setting (single chip mode) and Table 1.8.3 shows clock output setting
(memory expansion/microprocessor mode).
Note :When outputting the f
8
, f
32
or fc from port P5
3
/BCLK/ALE/CLK
OUT
pin in single chip mode, use port
P5
7
/RDY as an input only port.