
Universal Serial Bus
M30240 Group
Rev.1.00 Sep 24, 2003 Page 53 of 360
1.2.18.4.9 USB DMAx Request Registers
point x FIFO read/write requests are selected as the DMAC channel 0 or channel 1 request source. The USB
DMA0 (DMA1) Request Register should have only one bit set at any given time. When multiple bits are set,
no request is selected.
Figure 1.41:
USB DMA0 Request Register
Figure 1.42:
USB DMA1 Request Register
1.2.18.4.10 USB Endpoint Enable Register
The USB Endpoint Enable Register, shown in
Figure 1.43, is used to enable/disable an individual endpoint.
Endpoint 0 is always enabled and cannot be disabled by firmware. All endpoints are enabled after reset.
Figure 1.43:
USB Endpoint Enable Register
USB DMA0 Request Register
Symbol
Address
When reset
USBSAR0
030916
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Function
W
DMA0R0
DMA0R1
DMA0R2
DMA0R3
DMA0R4
DMA0R5
DMA0R6
DMA0R7
Endpoint 1 IN FIFO write request selection bit
Endpoint 2 IN FIFO write request selection bit
Endpoint 3 IN FIFO write request selection bit
Endpoint 4 IN FIFO write request selection bit
Endpoint 1 OUT FIFO read request selection bit
Endpoint 2 OUT FIFO read request selection bit
Endpoint 3 OUT FIFO read request selection bit
Endpoint 4 OUT FIFO read request selection bit
0 0
0 : Not selected
1 : Selected
USB DMA1 Request Register
Symbol
Address
When reset
USBSAR1
030A16
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Function
W
R
DMA1R0
DMA1R1
DMA1R2
DMA1R3
DMA1R4
DMA1R5
DMA1R6
DMA1R7
Endpoint 1 IN FIFO write request selection bit
Endpoint 2 IN FIFO write request selection bit
Endpoint 3 IN FIFO write request selection bit
Endpoint 4 IN FIFO write request selection bit
Endpoint 1 OUT FIFO read request selection bit
Endpoint 2 OUT FIFO read request selection bit
Endpoint 3 OUT FIFO read request selection bit
Endpoint 4 OUT FIFO read request selection bit
0 0
0 : Not selected
1 : Selected
USB Endpoint Enable Register
Symbol
Address
When reset
USBEPEN
030B16
FF16
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Function
W
R
EP1_OUT
EP1_IN
EP2_OUT
EP2_IN
EP3_OUT
EP3_IN
EP4_OUT
EP4_IN
Endpoint 1OUT FIFO Enable bit
Endpoint 1 IN FIFO Enable bit
Endpoint 2OUT FIFO Enable bit
Endpoint 2 IN FIFO Enable bit
Endpoint 3 OUT FIFO Enable bit
Endpoint 3 IN FIFO Enable bit
Endpoint 4 OUT FIFO Enable bit
Endpoint 4 IN FIFO Enable bit
0 0
0 : Disabled
1 : Enabled