參數(shù)資料
型號: M2V28D30ATP-75
廠商: Mitsubishi Electric Corporation
英文描述: 128M Double Data Rate Synchronous DRAM
中文描述: 128M的雙數(shù)據(jù)速率同步DRAM
文件頁數(shù): 7/36頁
文件大?。?/td> 1216K
代理商: M2V28D30ATP-75
7
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
FUNCTION TRUTH TABLE
Current State
IDLE
/CS /RAS /CAS /WE Address
H
X
X
L
H
H
L
H
H
L
H
L
L
L
H
L
L
H
L
L
L
Command
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
Action
NOP
NOP
ILLEGAL
ILLEGAL
Bank Active, Latch RA
NOP
Auto-Refresh
Notes
X
H
L
X
H
L
H
X
X
BA
BA, CA, A10
BA, RA
BA, A10
X
Op-Code, Mode-
Add
X
X
BA
2
2
4
5
L
L
L
L
MRS
Mode Register Set
5
ROW ACTIVE
H
L
L
X
H
H
X
H
H
X
H
L
DESEL
NOP
TERM
NOP
NOP
NOP
Begin Read, Latch CA, Determine
Auto-Precharge
Begin Write, Latch CA, Determine
Auto-Precharge
Bank Active / ILLEGAL
Precharge / Precharge All
ILLEGAL
L
H
L
H
BA, CA, A10
READ / READA
L
H
L
L
BA, CA, A10
WRITE / WRITEA
L
L
L
L
L
L
H
H
L
H
L
H
BA, RA
BA, A10
X
Op-Code, Mode-
Add
X
X
BA
ACT
PRE / PREA
REFA
2
L
L
L
L
MRS
ILLEGAL
H
L
L
X
H
H
X
H
H
X
H
L
DESEL
NOP
TERM
NOP (Continue Burst to END)
NOP (Continue Burst to END)
Terminate Burst
Terminate Burst, Latch CA, Begin
New Read, Determine Auto-
Precharge
ILLEGAL
Bank Active / ILLEGAL
Terminate Burst, Precharge
ILLEGAL
L
H
L
H
BA, CA, A10
READ / READA
3
L
L
L
L
H
L
L
L
L
H
H
L
L
H
L
H
BA, CA, A10
BA, RA
BA, A10
X
Op-Code, Mode-
Add
WRITE / WRITEA
ACT
PRE / PREA
REFA
2
L
L
L
L
MRS
ILLEGAL
READ(Auto-
Precharge
Disabled)
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