參數(shù)資料
型號: M2V28D30ATP-75
廠商: Mitsubishi Electric Corporation
英文描述: 128M Double Data Rate Synchronous DRAM
中文描述: 128M的雙數(shù)據(jù)速率同步DRAM
文件頁數(shù): 32/36頁
文件大?。?/td> 1216K
代理商: M2V28D30ATP-75
32
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
[Initialize and Mode Register sets]
Command
/CLK
CLK
EMRS
PRE
NOP
MRS
PRE
AR
AR
MRS
ACT
Code
Code
Xa
Code
Xa
1 0
Xa
A0-9,11
A10
Code
1
BA0,1
DQS
DQ
1
0 0
0 0
Code
tMRD
tMRD
tRP
tRFC
tRFC
tMRD
Mode Register Set,
Reset DLL
Extended Mode
Register Set
[AUTO REFRESH]
Single cycle of auto-refresh is initiated with a REFA(/CS=/RAS=/CAS=L,/WE=CKE=H)
command. The refresh address is generated internally. 4096 REFA cycles within 64ms refresh
128Mbits memory cells. The auto-refresh is performed on 4 banks concurrently. Before performing
an auto refresh, all banks must be in the idle state. Auto-refresh to auto-refresh interval is minimum
tRFC . Any command must not be supplied to the device before tRFC from the REFA command.
Auto-Refresh
/CLK
CLK
/RAS
CKE
/CS
/CAS
/WE
A0-11
BA0,1
NOP or DESELECT
tRFC
Auto Refresh on All Banks
Auto Refresh on All Banks
CKE
Initialize and MRS
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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