參數(shù)資料
型號: M25PE80-VMN6TP
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 54/61頁
文件大?。?/td> 326K
代理商: M25PE80-VMN6TP
DC and AC parameters
M25PE80
54/61
Table 23.
Table 24.
Figure 29.
Reset ac waveforms
Reset conditions
Test conditions specified in
Table 17
and
Table 18
Symbol
Alt.
Parameter
Conditions
Min.
Typ.
Max.
Unit
t
RLRH(1)
1.
Value guaranteed by characterization, not 100% tested in production.
t
RST
Reset Pulse Width
10
μs
t
SHRH
Chip Select High to
Reset High
Chip should have been
deselected before Reset is
de-asserted
10
ns
Timings after a Reset Low pulse
(1)(2)
1.
All the values are guaranteed by characterization, and not 100% tested in production.
2.
See
Table 15
for a description of the device status after a Reset Low pulse.
Test conditions specified in
Table 17
and
Table 18
Symbol
Alt.
Parameter
Conditions:
Reset pulse occurred
Max.
Unit
t
RHSL
t
REC
Reset
Recovery
Time
While decoding an instruction
(3)
: WREN,
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
3.
S remains Low while Reset is Low.
30
μs
Under completion of an Erase or Program
cycle of a PW, PP, PE, SE, BE operation
300
μs
Under completion of an Erase cycle of an
SSE operation
3
ms
Under completion of a WRSR operation
t
W
(see
Table 22
)
ms
Device deselected (S High)
and
in Standby
mode
0
μs
AI06808
Reset
tRLRH
S
tRHSL
tSHRH
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