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參數(shù)資料
| 型號(hào)： | M25PE20-VMP6G |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 14/60頁 |
| 文件大?。?/td> | 310K |
| 代理商： | M25PE20-VMP6G |
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Operating features
M25PE20, M25PE10
14/60
4.7
Status Register
The Status Register contains two status bits that can be read by the Read Status Register
(RDSR) instruction. See
Section 6.4: Read Status Register (RDSR)
for a detailed
description of the Status Register bits.
4.8
Protection modes
The environments where non-volatile memory devices are used can be very noisy. No SPI
device can operate correctly in the presence of excessive noise. To help combat this, the
M25PE10 and M25PE20 feature the following data protection mechanisms:
4.8.1
Protocol-related protections
●
Power On Reset and an internal timer (t
PUW
) can provide protection against inadvertent
changes while the power supply is outside the operating specification.
Program, Erase and Write instructions are checked that they consist of a number of
clock pulses that is a multiple of eight, before they are accepted for execution.
All instructions that modify data must be preceded by a Write Enable (WREN)
instruction to set the Write Enable Latch (WEL) bit. This bit is returned to its reset state
by the following events:
–
Power-up
–
Reset (RESET) driven Low
–
Write Disable (WRDI) instruction completion
–
Page Write (PW) instruction completion
–
Page Program (PP) instruction completion
–
Write to Lock Register (WRLR) instruction completion
–
Page Erase (PE) instruction completion
–
SubSector Erase (SSE) instruction completion
–
Sector Erase (SE) instruction completion
–
Bulk Erase (BE) instruction completion
The Reset (Reset) signal can be driven Low to freeze and reset the internal logic. For
the specific cases of Program and Write cycles, the designer should refer to
Section 6.5: Write Status Register (WRSR)
,
Section 6.9: Page Write (PW)
,
Section 6.10: Page Program (PP)
,
Section 6.12: Page Erase (PE)
,
Section 6.14: Sector
Erase (SE)
, and
Section 6.13: SubSector Erase (SSE)
, and to
Table 14: Device status
after a Reset Low pulse
.
In addition to the low power consumption feature, the Deep Power-down mode offers
extra software protection from inadvertent Write, Program and Erase instructions while
the device is not in active use.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25PE20-VMP6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE20-VMP6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE10-VMN6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE10-VMN6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE20 | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE20-VMP6P | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE20-VMP6TG | 功能描述:IC FLASH 2MBIT 75MHZ 8VFQFPN RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:Forté™ 標(biāo)準(zhǔn)包裝:2,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應(yīng)商設(shè)備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8 |
| M25PE20-VMP6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE20-VMS6G | 制造商:Micron Technology Inc 功能描述: |
| M25PE20-VMW6G | 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays |
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