參數(shù)資料
型號: M24C32
廠商: 意法半導體
英文描述: 32K Serial IIC Bus EEPROM(32K串行IIC總線EEPROM)
中文描述: 32K的串行IIC總線的EEPROM(32K的串行總線EEPROM的國際進口許可證)
文件頁數(shù): 9/35頁
文件大小: 330K
代理商: M24C32
M24128, M24C64, M24C32
Signal description
9/35
2.3
Supply voltage (V
CC
)
2.3.1
Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage
within the specified [V
CC
(min), V
CC
(max)] range must be applied (see
Table 9
and
Table 10
).
In order to secure a stable DC supply voltage, it is recommended to decouple the V
CC
line
with a suitable capacitor (usually of the order of 10nF to 100nF) close to the V
CC
/V
SS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
W
).
2.3.2
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of V
CC
), the device does not respond to any
instruction until V
CC
has reached the Power On Reset threshold voltage (this threshold is
lower than the minimum V
CC
operating voltage defined in
Table 9
and
Table 10
).
When V
CC
has passed the POR threshold, the device is reset and is in Standby Power
mode.
2.3.3
Power-down
At Power-down (continuous decrease of V
CC
), as soon as V
CC
drops from the normal
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in the Standby Power mode (that is
there should be no internal Write cycle in progress).
Figure 4.
Maximum R
P
value versus bus parasitic capacitance (C) for an I
2
C bus
AI01665b
VCC
C
SDA
R
P
MASTER
R
P
SCL
C
100
0
4
8
12
16
20
C (pF)
M
)
10
1000
fc = 400kHz
fc = 100kHz
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