參數(shù)資料
型號: M16C30P
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機
文件頁數(shù): 54/57頁
文件大?。?/td> 583K
代理商: M16C30P
C - 1
REVISION HISTORY
M16C/30P Group Datasheet
Rev.
Date
Description
Summary
Page
0.70
0.80
Aug 26, 2004
Mar 18, 2005
First Edition issued
development support tools -> development tools
BCLK -> CPU clock
Table 1.1 Performance Outline of M16C/30P Group
Serial interface is revised.
Figure 1.2 Type., Memory Size, and Package is partly revised.
Table 1.4 Pin Detection (2) is partly revised.
Note 2 Table 5.3 A/D Conversion Characteristics is partly revised.
Symbol of Table 5.4 Power Supply Circuit Timing Characteristics is partly
revised.
Table 5.5 Electrical Characteristics is revised.
Table 5.19 Electrical Characteristics is revised.
Table 1.1 Performance Outline of M16C/30P Group is partly revised.
Table 1.2 Product List is partly revised.
Figure 1.2 Type No., Memory Size, and Package is partly revised.
Figure 1.3 Pin Configuration is partly revised.
Figure 1.4 Pin Configuration is partly revised.
Tables 1.3 to 1.4 Pin Characteristics are added.
Table 1.5 Pin Description is revised.
3. Memory is partly revised.
Table 4.1 SFR Information is partly revised.
Table 4.5 SFR Information is partly revised
Table 5.2 Recommended Operating Conditions is partly revised.
Table 5.3 A/D Conversion Characteristics is partly revised.
Note 1 is added in Table 5.6 External Clock Input (XIN input)
Table 5.7 Memory Expansion Mode and Microprocessor Mode is added.
Table 5.20 Memory Expansion Mode and Microprocessor Modes (for
setting with no wait) is added.
Figure 5.2 Ports P0 to P10 Measurement Circuit is added.
Table 5.21 Memory Expansion Mode and Microprocessor Modes (for 1- to
3-wait setting and external area access) is added.
Figure 5.5 Timing Diagram (3) is added.
Figure 5.6 Timing Diagram (4) is added.
Figure 5.7 Timing Diagram (5) is added.
Note 1 to 4 are added in Table 5.23 External Clock Input (XIN input)
Table 5.24 Memory Expansion Mode and Microprocessor Mode is added.
Table 5.37 Memory Expansion Mode and Microprocessor Modes (for
setting with no wait) is added.
Figure 5.8 Ports P0 to P10 Measurement Circuit is added.
Table 5.38 Memory Expansion Mode and Microprocessor Modes (for 1- to
3-wait setting and external area access) is added.
Figure 5.11 Timing Diagram (3) is added.
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Sep 01, 2005
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