參數(shù)資料
型號(hào): M16C30P
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁(yè)數(shù): 39/57頁(yè)
文件大?。?/td> 583K
代理商: M16C30P
M16C/30P Group
5. Electrical Characteristics
Rev.1.22
REJ03B0088-0122
Mar 30, 2007
Page 39 of 53
Figure 5.6
Timing Diagram (4)
BCLK
CSi
t
d(BCLK-CS)
25ns.max
ADi
BHE
25ns.max
ALE
25ns.max
-4ns.min
RD
25ns.max
t
h(BCLK-RD)
0ns.min
t
h(BCLK-AD)
3ns.min
t
h(BCLK-CS)
3ns.min
Hi-Z
DBi
t
h(RD-DB)
0ns.min
0ns.min
t
h(RD-AD)
t
cyc
Read timing
t
d(BCLK-AD)
t
d(BCLK-ALE)
t
h(BCLK-ALE)
t
su(DB-RD)
40ns.min
t
d(BCLK-RD)
t
ac1(RD-DB)
Memory Expansion Mode, Microprocessor Mode
(
For setting with no wait
)
Measuring conditions
· V
CC1
=V
CC2
=5V
· Input timing voltage : V
IL
=0.8V, V
IH
=2.0V
· Output timing voltage : V
OL
=0.4V, V
OH
=2.4V
WR, WRL,
WRH
25ns.max
t
h(BCLK-WR)
0ns.min
BCLK
CSi
t
d(BCLK-CS)
25ns.max
ADi
BHE
t
d(BCLK-AD)
25ns.max
ALE
25ns.max
t
d(BCLK-ALE)
t
h(BCLK-ALE)
-4ns.min
t
h(BCLK-AD)
3ns.min
t
h(BCLK-CS)
3ns.min
t
cyc
t
h(WR-AD)
(0.5
×
t
cyc
-10)ns.min
t
d(BCLK-DB)
40ns.max
4ns.min
t
h(BCLK-DB)
t
d(DB-WR)
(0.5
×
t
cyc
-40)ns.min
t
h(WR-DB)
(0.5
×
t
cyc
-10)ns.min
DBi
Write timing
t
d(BCLK-WR)
Hi-Z
(0.5
×
t
cyc
-45)ns.max
t
cyc
=
1
f(BCLK)
V
CC1
=V
CC2
=5V
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