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參數(shù)資料
| 型號： | LXT9860AHC |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 83/96頁 |
| 文件大?。?/td> | 1309K |
| 代理商： | LXT9860AHC |
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
Datasheet
83
5.2.2
Search Address Registers
The Search Address Register set is described in
Table 55
.
5.3
Control and Status Registers
The Control and Status Register set includes general port control and status registers that conform
to the bit assignments shown in
Table 56, Table 58, and Table 60
. Additional control and status
registers with alternate bit assignments are shown in
Table 61
through
Table 68
.
5.3.1
Port Link Control Register
The Port Link Control Register is described in
Table 57
. Refer to
Table 56
for Port Link Control
Register bit assignments.
Table 55. Search Address Registers
Name
Type
Addr
Size
(bits)
Description
Search Address Register
Refer to
Table 53
for bit
assignments.
R/W
08A, 08B
48
On-board address search register. Should the user
wish to find out if a particular source address has
been seen on any of the ports, on any of the
segments, this register would be used. Each port
within an LXT980 chip will be checked for traffic
originating from the source address matching this
register. If a match is found, the port number where
the traffic originated will be saved thus allowing
software to determine where the address is located.
The register that contains the port from the Search
Address Match Function is the Search Address
Match Register.
(default = Xs)
Search Port Match Register
Refer to
Table 56 on page 83
for bit
assignments.
R
090
5
This register holds the port number of the host which
uses the address specified in the Search Address
Register. When the Auto-Clear bit (bit 11) in the
Repeater Configuration Register is set to a
‘
0
’
, this
register is cleared upon reading. If the Auto-Clear bit
is set to a
‘
1
’
, this register
’
s bit(s) are cleared by
writing a
‘
1
’
to the appropriate bit(s). (default = 0s)
Table 56. Port Link Control and Status Register Bit Assignments
31:4
3
2
1
0
Rsvd
Port 4
Port 3
Port 2
Port 1
Table 57. Port Link Control Register
Name
Type
Addr
Description
Port Link Control
R/W
091
This register controls the link function of the 4 twisted-pair ports of
the LXT980. When disabled, a port will no longer be disconnected
due to link fail. When enabled, the port will only remain connected
to the network so long as link pulses are being received: 0 =
disable, 1 = enable (default).
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