參數(shù)資料
型號(hào)： LXT980QC
英文描述： LAN HUB CONTROLLER
中文描述： 局域網(wǎng)集線器控制器
文件頁數(shù)： 88/96頁
文件大?。?/td> 1309K
代理商： LXT980QC
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
88
Datasheet
5.4
Configuration Registers
The Configuration Register set is described in
Table 69
. Bit assignments for the configuration
registers are shown in
Table 70
through
Table 77
.
Table 68. MII Status Register
Name
Type
Addr
Description
MII Register
R
0B4
Used to give the status of the MII port. Default is set by pins.
Table 69. Configuration Registers
Name
Type
1
Addr
Description
Repeater Configuration Register
R/W
0AB
Refer to
Table 70
for bit assignments.
Repeater Serial Configuration
Register
R
0AC
This 8 bit register holds user-defined data. These bits may be
used to indicate the type of board configuration, port count or
other vendor-related data. Default is set by pins.
Device/Revision ID register
R
0AD
This register follows the IEEE 1149.1 specification. Refer to
Table 72
for bit assignments.
The upper 4 bits identify the device revision level. The next 16
bits store the Part ID Number, which in this case is hexadecimal
‘
3D4
’
. The next 11 bits contain a JEDEC Manufacturer ID, which
for Intel is hexadecimal
‘
FE
’
. The lowest bit (0) is set only for the
first device in a chain.
Reserved
R
0B0
Ignore on read.
Global LED Control Register
R/W
0B1
Refer to
Table 73
for bit assignments. This register reflects the
LED Mode set by pins 207 and 208, and provides software
control for the global Fault LED.
LED Mode, Bit Encoding (read only from pins):
Bit 5
Bit 4
Mode Selected
0
0
Mode 1
0
1
Mode 2
1
0
Mode 3
1
1
Reserved
Global Fault LED, Bit Encoding:
Bits 3 : 2
Modes 1 & 3
Mode 2
0 0
LED off
LED off
0 1
2
Hardware control
Hardware control
1 0
Reserved
LED slow blink
1 1
3
LED off
LED on steady
1. R = Read only; W = Write only; R/W = Read /Write.
2. Default value if manager is not present.
3. Default value if manager is present.
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