參數(shù)資料
型號: LXT980QC
英文描述: LAN HUB CONTROLLER
中文描述: 局域網(wǎng)集線器控制器
文件頁數(shù): 82/96頁
文件大?。?/td> 1309K
代理商: LXT980QC
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
82
Datasheet
5.2
Ethernet Address Registers
All Ethernet address registers consist of two 32-bit registers that together contain a 48-bit Ethernet
address. Refer to
Table 53
for register bit assignments.
5.2.1
Port Address Tracking Registers
The port address tracking register set is described in
Table 54
. These registers continuously
monitor the source addresses of packets emanating from the corresponding ports. Refer to
Table 53
for bit assignments.
etherStatsCollisions/ rptr
Monitor Transmit Collisions
R/W
066
The best estimate of the total number of collisions on this interface.
etherStatsPkts64Octets
R/W
067
No. of packets (good and bad) that were 64 octets long.
etherStatsPkts65to127Octets
R/W
068
No. of packets (good and bad) between 65 and 127 octets long.
etherStatsPkts128to255Octets
R/W
069
No. of packets (good and bad) between 128 and 255 octets long.
etherStatsPkts256to511Octets
R/W
06A
No. of packets (good and bad) between 256 and 511 octets long.
etherStatsPkts512to1023Octets
R/W
06B
No. of packets (good and bad) between 512 and 1023 octets
long.
etherStatsPkts1024to1518Octets
R/W
06C
No. of packets (good and bad) between 1024 and 1518 octets long.
Not Used
R/W
06D
rptrMonitorTotalOctets
(Lower/Upper)
R/W
06E,
06F
Total number of octets contained in valid frames received on this
segment. Counter is not cleared by ZeroCount bit.
Table 52. RMON Counter Registers (Continued)
Name
Type
Addr
Description
Table 53. Ethernet Address Register Bit Assignments
Upper Address
Bits 15:0 contain bits 47:32 of the Ethernet Address.
Lower Address
Bits 31:0 contain bits 31:0 of the Ethernet Address.
Table 54. Port Address Tracking Registers
Name
Size,
bits
Addr
Description
rptrAddrTrackNewLastSrcAddress
Port 1
48
070, 071
Stores the value of the last Source Address received.
Can also act as NewLastSourceAddress via SW. These
addresses power up unknown, but can be zeroed by
software.
Example Address: 00-20-7B-03-02-01
First Read:
msb
037B2000
lsb
.
Second Read:
msb
XXXX0102
lsb
All addresses must read in order. Only the first read
updates the holding register. X
s are currently defined
as zeros.
rptrAddrTrackNewLastSrcAddress
Port 2
48
072, 073
rptrAddrTrackNewLastSrcAddress
Port 3
48
074, 075
rptrAddrTrackNewLastSrcAddress
Port 4
48
076, 077
rptrAddrTrackNewLastSrcAddress
Port 5 (MII)
48
078, 079
1. All port address tracking registers are Read/Write.
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