Datasheet
5
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
Figures
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater..................................9
Pin Assignments .................................................................................................10
Typical Managed Repeater Architectures ..........................................................21
Typical Unmanaged 100 Mbps Repeater Architectures .....................................21
Typical Hybrid Switch/Repeater Application .......................................................22
Typical Application Block Diagram .....................................................................23
IRB Block Diagram .............................................................................................36
MII (Port 5) Operation .........................................................................................38
MII Timing Issues ...............................................................................................40
Typical Serial Bus Architecture ..........................................................................41
Serial Management Frame Format ....................................................................43
Address Arbitration Mechanisms ........................................................................46
Serial EEPROM Interface ...................................................................................47
Optional R/W Serial EEPROM Interface ............................................................47
Managed 10/100 Repeater Stack .......................................................................52
Hybrid Switch/Repeater Application - for Balanced 10/100 Performance ..........52
Hybrid Switch/Repeater Application - Weighted Toward 100 Mbps Performance .
53
Unmanaged 100-Only Repeater Stack ..............................................................53
Power and Ground Connections ........................................................................54
Typical Fiber Port Interface ................................................................................55
Typical Twisted-Pair Port Interface and Power Supply Filtering ........................56
Typical 100 Mbps IRB Implementation ...............................................................57
Typical 10 Mbps IRB Implementation .................................................................57
Typical Serial Management Interface Connections ............................................58
Typical Reset Circuit ..........................................................................................58
100 Mbps Port-to-Port Delay Timing ..................................................................63
100BASE-TX Transmit Timing - PHY MODE MII ...............................................64
100BASE-TX Receive Timing - PHY Mode MII ..................................................65
100BASE-TX Transmit Timing - MAC Mode MII ................................................66
100BASE-TX Receive Timing - MAC Mode MII .................................................67
100BASE-FX Transmit Timing - PHY Mode MII .................................................68
100BASE-FX Receive Timing - PHY Mode MII ..................................................69
100BASE-FX Transmit Timing - MAC Mode MII ................................................70
100BASE-FX Receive Timing - MAC Mode MII .................................................71
10BASE-T Transmit Timing - PHY Mode MII .....................................................72
10BASE-T Receive Timing - PHY Mode MII ......................................................73
100 Mbps IRB Timing .........................................................................................74
10 Mbps IRB Receive Timing .............................................................................75
10 Mbps IRB Transmit Timing ............................................................................76
Serial Management Interface Timing .................................................................77
PROM Interface Timing ......................................................................................78
Package Specifications.......................................................................................95
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42