LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
40
Datasheet
2.6
Serial Management I/F
The high-speed Serial Management Interface (SMI) provides access to repeater MIB variables,
RMON Statistics attributes and status and control information. A network manager can access the
interface through a simple serial communications controller. The interface is designed to be used in
a multi-drop configuration, allowing multiple LXT980 devices to be managed from one common
line.
The interface consists of a data input line (SRX), data output line (STX), and a clock (SERCLK). It
can operate at up to 2 Mbps. The interface operates on a simple command response model, with the
network manager as the master and the LXT980 devices as slaves.
Figure 10
is a simplified view of
typical serial management interface architecture. Refer to
Figure 24 on page 58
for circuit details.
Figure 9. MII Timing Issues
MII
TP
PHY
Prop Delay
≤
20 BT
MAC
MII
TP
PHY
Prop Delay
≤
20 BT
MAC
Class II RPTR
Prop Delay
≤
46 BT
TP
MII
MAC
Class II RPTR
Prop Delay
≤
46 BT
MII
TP
PHY
Prop Delay
≤
20 BT
MAC
MII
TP
PHY
Prop Delay
≤
20 BT
MAC
Class II RPTR
Prop Delay
≤
46 BT
TP
MII
Class II RPTR
Prop Delay
≤
46 BT
PHY
Prop Delay
≤
20 BT
Prop Delay
≤
112 BT
TP
TP
TP
LXT980 Port 5 (MII)
operating in MAC Mode,
connected to a PHY device.
LXT980 Port 5 (MII)
operating in PHY Mode,
connected to a MAC device.
TP Ports
PHY
LXT980
Meets Class II
RPTR Prop Delay
( ≤
46 BT )
TP Port
MII Port
Does Not Meet
Class II RPTR
Prop Delay
P1
P2
P3
P4
P5
MII Port
MII
TP
PHY
Prop Delay
≤
20 BT
MAC
MII
TP
PHY
Prop Delay
≤
20 BT
MAC
Class II RPTR
Prop Delay
≤
46 BT
Class II RPTR
Prop Delay
≤
46 BT
MII-to-MII
Prop Delay
≤
132 BT
TP
Propagation Delay Requirements per IEEE 802.3u:
- PHY prop delay (MII-TP) must be
≤
20 BT
- Class II Repeater prop delay (TP-TP) must be
≤
46 BT
PHY-to-MAC
Prop Delay
≤
132 BT
A
B
C
D