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參數(shù)資料
| 型號： | LXT381BE |
| 廠商： | INTEL CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Octal E1 Line Interface Unit |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PBGA160 |
| 封裝： | PLASTIC, BGA-160 |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 218K |
| 代理商： | LXT381BE |
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Octal E1 Line Interface
—
LXT381
Datasheet
9
45
46
N5
P5
TTIP0
TRING0
AO
AO
Transmit Tip Output.
Transmit Ring Output.
These pins are differential line driver outputs designed to drive 75
unbalanced or 120
balanced cables with a 1:2 transformer
and two 11
series resistors. TRING and TTIP will be in high impedance state if the
TCLK pin is Low.
47
N6, P6
TGND0
S
Transmit Driver Ground.
Ground pin for the output driver.
48
49
P7
N7
RTIP0
RRING0
AI
AI
Receive TIP Input.
Receive Ring Input.
These pins are the inputs to the differential line receiver. Data is recovered
and output on the RPOS/RNEG pins.
50
L6, M6
TGND1
S
Transmit Driver Ground.
51
52
M5
L5
TRING1
TTIP1
AO
AO
Transmit Ring Output.
Transmit Tip Output.
53
L4, M4
TVCC1
S
Transmit Driver Power Supply.
Power supply pin for the output driver.
54
55
L7
M7
RRING1
RTIP1
AI
AI
Receive Ring Input.
Receive Tip Input.
56
L11, M11
TVCC2
S
Transmit Driver Power Supply.
57
58
L10
M10
TTIP2
TRING2
AO
AO
Transmit Tip Output.
Transmit Ring Output.
59
L9, M9
TGND2
S
Transmit Driver Ground.
60
61
M8
L8
RTIP2
RRING2
AI
AI
Receive TIP Input.
Receive Ring Input.
62
N9, P9
TGND3
S
Transmit Driver Ground.
Ground pin for the output driver.
63
64
P10
N10
TRING3
TTIP3
AO
AO
Transmit Ring.
Transmit Tip Output.
65
N11, P11
TVCC3
S
Transmit Driver Power Supply.
Power supply pin for the output driver.
66
67
N8
P8
RRING3
RTIP3
AI
AI
Receive Ring Input.
Receive Tip Input.
68
K11
ALOS3
DO
Analog Loss of Signal Output.
69
70
P12
P13
RNEG3
RPOS3
DO
DO
Receive Negative Data Output.
Receive Positive Data Output.
71
P14
RCLK3
DO
Receive Clock Output.
72
73
N12
N13
TNEG3
TPOS3
DI
DI
Transmit Negative Data Input.
Transmit Positive Data Input.
74
N14
TCLK3
DI
Transmit Clock Input.
75
K12
ALOS2
DO
Analog Loss of Signal Output.
76
77
M12
M13
RNEG2
RPOS2
DO
DO
Receive Negative Data Output.
Receive Positive Data Output.
Table 1. LXT381 Pin Description (Continued)
Pin #
LQFP
Pin #
PBGA
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;
N.C.: Not
Connected.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LXT381LE | Octal E1 Line Interface Unit |
| LXT381 | Octal E1 Line Interface Unit |
| LXT386 | QUAD T1/E1/J1 Transceiver |
| LXT400 | All Rate Extended Range Switched 56/DDS Transceiver |
| LXT441 | Switched 56/DDS Integrated DSU/CSU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT381LE | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Octal E1 Line Interface Unit |
| LXT384/LXT386/LXT388 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LXT384/LXT386/LXT388 - LXT384/6/8 Twisted Pair Interface Without Component Changes |
| LXT384BE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| LXT384LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| LXT386 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:QUAD T1/E1/J1 Transceiver |
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