參數(shù)資料
型號: LXT386
廠商: Intel Corp.
英文描述: QUAD T1/E1/J1 Transceiver
中文描述: 四T1/E1/J1收發(fā)器
文件頁數(shù): 1/78頁
文件大小: 500K
代理商: LXT386
LXT386
QUAD T1/E1/J1 Transceiver
Datasheet
The LXT386 is a quad short haul Pulse Code Modulation (PCM) transceiver for use in both
1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It incorporates four independent receivers
and four independent transmitters in a single PBGA-160 or LQFP-100 package.
The transmit drivers provide low impedance independent of the transmit pattern and supply
voltage variations.The LXT386 transmits shaped waveforms meeting G.703 and T1.102
specifications. The LXT386 exceeds the latest transmit return loss specifications, such as ETSI
ETS-300166.
The LXT386’s differential receiver architecture provides high noise interference margin and is
able to work with up to 12 dB of cable attenuation. The digital clock recovery PLL and jitter
attenuator are referenced to a low frequency 1.544 MHz or 2.048 MHz clock.
The LXT386 incorporates an advanced crystal-less jitter attenuator switchable between the
receive and transmit path. The jitter attenuation performance meets the latest international
specifications such as CTR12/13. The jitter attenuation performance was optimized for
Synchronous Optical NETwork/Synchronous Digital Hierarchy (SONET/SDH) applications.
The LXT386 can be configured as a 3 channel transceiver with G.772 compliant non intrusive
protected monitoring points. It uses a single 3.3V supply for low power consumption.
The constant delay characteristic of the LXT386 JA as well as a power down mode of all
transmitters allows the implementation of Hitless Protection Switching (HPS) applications
without the use of relays.
Applications
I
SONET/SDH tributary interfaces
I
Digital cross connects
I
Public/private switching trunk line
interfaces
I
Microwave transmission systems
I
M13, E1-E3 MUX
As of January 15, 2001, this document replaces the Level One document
LXT386 — QUAD T1/E1/J1 Transceiver Font>
.
Order Number:
249253-001
January 2001
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