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參數(shù)資料
| 型號(hào)： | LTC4269IDKD-2#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO32 |
| 封裝： | 7 X 4 MM, PLASTIC, M0-229, DFN-32 |
| 文件頁數(shù)： | 22/34頁 |
| 文件大?。?/td> | 383K |
| 代理商： | LTC4269IDKD-2#TR |
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LTC4269-2
42692fb
applicaTions inForMaTion
tCHARGE is calculated by assuming the following:
VREF = 2.5V, RT = 35.7k, RB = 100k, CSS = 0.1F and
VSS(MIN) = 0.45V.
tCHARGE = t(VSS = 0.8V) – t(VSS = 0.45V)
Step 1:
SS_MAXDC(DC) = 2.5[100k/(35.7k + 100k)] = 1.84V
RCHARGE = (35.7k 100k/135.7k) = 26.3k
Step 2:
t(VSS = 0.45V) is calculated from:
t = RCHARGE CSS (–1) ln(1 – VSS/SS_MAXDC(DC))
= 2.63e4 1e–7 (–1) ln(1 – 0.45/1.84)
= 2.63e–3 (–1) ln(0.755) = 7.3e–4 s
Step 3:
t(VSS = 0.8V) is calculated from:
t = RCHARGE CSS (–1) ln(1 – VSS/SS–MAXDC(DC))
= 2.63e4 1e–7 (–1) ln(1 – 0.8/1.84)
= 2.63e–3 (–1) ln(0.565) = 1.5e–3 s
From Step 1 and Step 2
tCHARGE = (1.5 – 0.73)e–3 s = 7.7e–4 s
The total time of no switching for the converter due to a
soft-start event
= tDISCHARGE + tCHARGE = 1.85e–4 + 7.7e–4 = 9.55e–4 s
Example (2) Converter Output Rise Time
The rise time for the converter output to reach regulation
can be closely approximated as the time between the start
ofswitching(SS_MAXDC=VSS(ACTIVE))andthetimewhere
converter duty cycle is in regulation (DC(REG)) and no
longercontrolledbySS_MAXDC(SS_MAXDC=VSS(REG)).
Converter output rise time can be expressed as:
Output Rise Time = t(VSS(REG)) – t(VSS(ACTIVE))
Step1:DetermineconverterdutycycleDC(REG)foroutput
in regulation.
The natural duty cycle DC(REG) of the converter depends
on several factors. For this example it is assumed that
DC(REG) = 60% for power supply input voltage near the
power supply UVLO. This gives SD_VSEC = 1.32V.
Also assume that the maximum duty cycle clamp pro-
grammed for this condition is 72% for SS_MAXDC(DC)
= 1.84V, fOSC = 200kHz and RDELAY = 40k.
Step 2: Calculate VSS(REG)
To calculate the level of SS_MAXDC (VSS(REG)) that no
longer clamps the natural duty cycle of the converter, the
equation for maximum duty cycle clamp must be used
(see previous section Programming Maximum Duty Cycle
Clamp).
The point where the maximum duty cycle clamp meets
DC(REG) during soft-start is given by:
DC(REG) = Max Duty Cycle Clamp
0.6 = k 0.522(SS_MAXDC(DC)/SD_VSEC) – (tDELAY
fOSC)
For SD_VSEC = 1.32V, fOSC = 200kHz and
RDELAY = 40k
This gives k = 1 and tDELAY = 40ns.
Rearranging the above equation to solve for SS_MAXDC
= VSS(REG)
= [0.6 + (tDELAY fOSC)(SD_VSEC)]/(k 0.522)
= [0.6 + (40ns 200kHz)(1.32V)]/(1 0.522)
= (0.608)(1.32)/0.522 = 1.537V
Step 3: Calculate t(VSS(REG)) – t(VSS(ACTIVE))
Recall the time for SS_MAXDC to charge to a given volt-
age VSS is given by:
t = RCHARGE CSS (–1) ln(1 – VSS/SS_MAXDC(DC))
(Figure 16 gives the model for SS_MAXDC charging)
For RT = 35.7k, RB = 100k, RCHARGE = 26.3k
For CSS = 0.1F, this gives t(VSS(ACTIVE))
= t(VSS(0.8V)) = 2.63e4 1e–7 (–1) ln(1 – 0.8/1.84)
= 2.63e–3 (–1) ln(0.565) = 1.5e–3 s
t(VSS(REG)) = t(VSS(1.537V)) = 26.3k 0.1F –1
ln(1 – 1.66/1.84) = 2.63e–3 (–1) ln(0.146) = 5e–3 s
The rise time for the converter output:
= t(VSS(REG)) – t(VSS(ACTIVE)) = (5 – 1.5)e–3 s
= 3.5e–3 s
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